forked from Archive/PX4-Autopilot
Implement serial receive DMA for the F1xx. This is not quite working right yet. Some clients work, others not so much.
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e2f7a46812
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469d13fdfe
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@ -95,4 +95,25 @@ __EXPORT void stm32_boardinitialize(void)
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stm32_configgpio(GPIO_ADC_VBATT);
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stm32_configgpio(GPIO_ADC_IN5);
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/* set up the serial DMA polling */
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#ifdef SERIAL_HAVE_DMA
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{
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static struct hrt_call serial_dma_call;
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struct timespec ts;
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/*
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* Poll at 1ms intervals for received bytes that have not triggered
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* a DMA event.
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*/
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ts.tv_sec = 0;
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ts.tv_nsec = 1000000;
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hrt_call_every(&serial_dma_call,
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ts_to_abstime(&ts),
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ts_to_abstime(&ts),
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(hrt_callout)stm32_serial_dma_poll,
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NULL);
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}
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#endif
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}
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@ -79,50 +79,74 @@
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#if SERIAL_HAVE_DMA
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/* Verify that DMA has been enabled an the DMA channel has been defined.
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* NOTE: These assignments may only be true for the F4.
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# if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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/* Verify that DMA has been enabled and the DMA channel has been defined.
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*/
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# if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART6_RXDMA)
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# ifndef CONFIG_STM32_DMA2
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# error STM32 USART1/6 receive DMA requires CONFIG_STM32_DMA2
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# if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART6_RXDMA)
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# ifndef CONFIG_STM32_DMA2
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# error STM32 USART1/6 receive DMA requires CONFIG_STM32_DMA2
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# endif
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# endif
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# endif
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# if defined(CONFIG_USART2_RXDMA) || defined(CONFIG_USART3_RXDMA) || \
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# if defined(CONFIG_USART2_RXDMA) || defined(CONFIG_USART3_RXDMA) || \
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defined(CONFIG_UART4_RXDMA) || defined(CONFIG_UART5_RXDMA)
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# ifndef CONFIG_STM32_DMA1
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# error STM32 USART2/3/4/5 receive DMA requires CONFIG_STM32_DMA1
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# ifndef CONFIG_STM32_DMA1
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# error STM32 USART2/3/4/5 receive DMA requires CONFIG_STM32_DMA1
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# endif
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# endif
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# endif
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/* For the F4, there are alternate DMA channels for USART1 and 6.
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* Logic in the board.h file make the DMA channel selection by defining
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* the following in the board.h file.
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*/
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# if defined(CONFIG_USART1_RXDMA) && !defined(DMAMAP_USART1_RX)
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# error "USART1 DMA channel not defined (DMAMAP_USART1_RX)"
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# endif
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# if defined(CONFIG_USART1_RXDMA) && !defined(DMAMAP_USART1_RX)
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# error "USART1 DMA channel not defined (DMAMAP_USART1_RX)"
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# endif
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# if defined(CONFIG_USART2_RXDMA) && !defined(DMAMAP_USART2_RX)
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# error "USART2 DMA channel not defined (DMAMAP_USART2_RX)"
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# endif
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# if defined(CONFIG_USART2_RXDMA) && !defined(DMAMAP_USART2_RX)
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# error "USART2 DMA channel not defined (DMAMAP_USART2_RX)"
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# endif
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# if defined(CONFIG_USART3_RXDMA) && !defined(DMAMAP_USART3_RX)
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# error "USART3 DMA channel not defined (DMAMAP_USART3_RX)"
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# endif
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# if defined(CONFIG_USART3_RXDMA) && !defined(DMAMAP_USART3_RX)
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# error "USART3 DMA channel not defined (DMAMAP_USART3_RX)"
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# endif
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# if defined(CONFIG_UART4_RXDMA) && !defined(DMAMAP_UART4_RX)
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# error "UART4 DMA channel not defined (DMAMAP_UART4_RX)"
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# endif
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# if defined(CONFIG_UART4_RXDMA) && !defined(DMAMAP_UART4_RX)
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# error "UART4 DMA channel not defined (DMAMAP_UART4_RX)"
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# endif
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# if defined(CONFIG_UART5_RXDMA) && !defined(DMAMAP_UART5_RX)
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# error "UART5 DMA channel not defined (DMAMAP_UART5_RX)"
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# endif
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# if defined(CONFIG_UART5_RXDMA) && !defined(DMAMAP_UART5_RX)
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# error "UART5 DMA channel not defined (DMAMAP_UART5_RX)"
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# endif
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# if defined(CONFIG_USART6_RXDMA) && !defined(DMAMAP_USART6_RX)
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# error "USART6 DMA channel not defined (DMAMAP_USART6_RX)"
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# endif
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# elif defined(CONFIG_STM32_STM32F10XX)
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# if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \
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defined(CONFIG_USART3_RXDMA)
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# ifndef CONFIG_STM32_DMA1
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# error STM32 USART1/2/3 receive DMA requires CONFIG_STM32_DMA1
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# endif
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# endif
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# if defined(CONFIG_UART4_RXDMA)
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# ifndef CONFIG_STM32_DMA2
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# error STM32 USART4 receive DMA requires CONFIG_STM32_DMA2
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# endif
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# endif
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/* There are no optional DMA channel assignments for the F1 */
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# define DMAMAP_USART1_RX DMACHAN_USART1_RX
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# define DMAMAP_USART2_RX DMACHAN_USART2_RX
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# define DMAMAP_USART3_RX DMACHAN_USART3_RX
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# define DMAMAP_UART4_RX DMACHAN_USART4_RX
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# if defined(CONFIG_USART6_RXDMA) && !defined(DMAMAP_USART6_RX)
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# error "USART6 DMA channel not defined (DMAMAP_USART6_RX)"
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# endif
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/* The DMA buffer size when using RX DMA to emulate a FIFO.
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@ -156,6 +180,27 @@
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# error "Unknown STM32 DMA"
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# endif
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/* DMA control word */
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# if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define SERIAL_DMA_CONTROL_WORD \
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(DMA_SCR_DIR_P2M | \
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DMA_SCR_CIRC | \
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DMA_SCR_MINC | \
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DMA_SCR_PSIZE_8BITS | \
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DMA_SCR_MSIZE_8BITS | \
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CONFIG_USART_DMAPRIO | \
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DMA_SCR_PBURST_SINGLE | \
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DMA_SCR_MBURST_SINGLE)
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# else
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# define SERIAL_DMA_CONTROL_WORD \
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(DMA_CCR_CIRC | \
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DMA_CCR_MINC | \
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DMA_CCR_PSIZE_8BITS | \
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DMA_CCR_MSIZE_8BITS | \
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CONFIG_USART_DMAPRIO)
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# endif
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#endif
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/* Power management definitions */
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@ -1037,14 +1082,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
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priv->usartbase + STM32_USART_DR_OFFSET,
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(uint32_t)priv->rxfifo,
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RXDMA_BUFFER_SIZE,
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DMA_SCR_DIR_P2M |
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DMA_SCR_CIRC |
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DMA_SCR_MINC |
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DMA_SCR_PSIZE_8BITS |
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DMA_SCR_MSIZE_8BITS |
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CONFIG_USART_DMAPRIO |
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DMA_SCR_PBURST_SINGLE |
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DMA_SCR_MBURST_SINGLE);
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SERIAL_DMA_CONTROL_WORD);
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/* Reset our DMA shadow pointer to match the address just
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* programmed above.
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@ -145,7 +145,7 @@
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* extended to the F1 and F2 with a little effort in the DMA code.
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*/
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#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA) || !defined(CONFIG_STM32_STM32F40XX)
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#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA)
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# undef CONFIG_USART1_RXDMA
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# undef CONFIG_USART2_RXDMA
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# undef CONFIG_USART3_RXDMA
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@ -188,6 +188,11 @@ CONFIG_USART1_2STOP=0
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CONFIG_USART2_2STOP=0
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CONFIG_USART3_2STOP=0
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CONFIG_USART1_RXDMA=y
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SERIAL_HAVE_CONSOLE_DMA=y
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CONFIG_USART2_RXDMA=y
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CONFIG_USART3_RXDMA=y
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#
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# PX4IO specific driver settings
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#
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