forked from Archive/PX4-Autopilot
Changes to aerocore for upstream Nuttx
This commit is contained in:
parent
1b17bc74b2
commit
2e235b9013
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@ -1,5 +1,5 @@
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/************************************************************************************
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* configs/aerocore/include/board.h
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* nuttx-configs/aerocore/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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@ -146,11 +146,23 @@
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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* Note: TIM1,8-11 are on APB2, others on APB1
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*/
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#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
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#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
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#define BOARD_TIM1_FREQUENCY STM32_APB2_TIM1_CLKIN
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#define BOARD_TIM2_FREQUENCY STM32_APB1_TIM2_CLKIN
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#define BOARD_TIM3_FREQUENCY STM32_APB1_TIM3_CLKIN
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#define BOARD_TIM4_FREQUENCY STM32_APB1_TIM4_CLKIN
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#define BOARD_TIM5_FREQUENCY STM32_APB1_TIM5_CLKIN
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#define BOARD_TIM6_FREQUENCY STM32_APB1_TIM6_CLKIN
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#define BOARD_TIM7_FREQUENCY STM32_APB1_TIM7_CLKIN
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#define BOARD_TIM8_FREQUENCY STM32_APB2_TIM8_CLKIN
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#define BOARD_TIM9_FREQUENCY STM32_APB2_TIM9_CLKIN
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#define BOARD_TIM10_FREQUENCY STM32_APB2_TIM10_CLKIN
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#define BOARD_TIM11_FREQUENCY STM32_APB2_TIM11_CLKIN
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#define BOARD_TIM12_FREQUENCY STM32_APB1_TIM12_CLKIN
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#define BOARD_TIM13_FREQUENCY STM32_APB1_TIM13_CLKIN
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#define BOARD_TIM14_FREQUENCY STM32_APB1_TIM14_CLKIN
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/* Alternate function pin selections ************************************************/
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@ -1,5 +1,5 @@
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############################################################################
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# configs/aerocore/nsh/Make.defs
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# nuttx-configs/aerocore/nsh/Make.defs
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#
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# Copyright (C) 2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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@ -35,6 +35,8 @@
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include ${TOPDIR}/.config
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include ${TOPDIR}/tools/Config.mk
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include $(TOPDIR)/PX4_Warnings.mk
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include $(TOPDIR)/PX4_Config.mk
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include $(TOPDIR)/PX4_Warnings.mk
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@ -42,7 +44,7 @@ include $(TOPDIR)/PX4_Warnings.mk
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# We only support building with the ARM bare-metal toolchain from
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# https://launchpad.net/gcc-arm-embedded on Windows, Linux or Mac OS.
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#
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CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI
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CONFIG_ARMV7M_TOOLCHAIN := GNU_EABI${HOST_OS_FIRST_LETTER}
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include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
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@ -62,17 +64,19 @@ ARCHCPUFLAGS = -mcpu=cortex-m4 \
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-mfpu=fpv4-sp-d16 \
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-mfloat-abi=hard
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# Enable precise stack overflow tracking
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# enable precise stack overflow tracking
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
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endif
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# pull in *just* libm from the toolchain ... this is grody
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# Pull in *just* libm from the toolchain ... this is grody
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LIBM = "${shell $(CC) $(ARCHCPUFLAGS) -print-file-name=libm.a}"
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EXTRA_LIBS += $(LIBM)
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# use our linker script
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# Use our linker script
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LDSCRIPT = ld.script
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ifeq ($(WINTOOL),y)
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
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else
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# Linux/Cygwin-native toolchain
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MKDEP = $(TOPDIR)/tools/mkdeps.sh
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MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
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ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
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ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
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endif
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endif
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# tool versions
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# Tool versions
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ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
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ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
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# optimisation flags
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# Optimization flags
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ARCHOPTIMIZATION = $(MAXOPTIMIZATION) \
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-fno-strict-aliasing \
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-fno-strength-reduce \
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ARCHDEFINES =
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ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
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# this seems to be the only way to add linker flags
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# This seems to be the only way to add linker flags
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EXTRA_LIBS += --warn-common \
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--gc-sections
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@ -146,8 +153,8 @@ OBJEXT = .o
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LIBEXT = .a
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EXEEXT =
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# Produce partially-linked $1 from files in $2
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# produce partially-linked $1 from files in $2
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define PRELINK
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@echo "PRELINK: $1"
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$(Q) $(LD) -Ur -o $1 $2 && $(OBJCOPY) --localize-hidden $1
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@ -1,42 +0,0 @@
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############################################################################
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# configs/aerocore/nsh/appconfig
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#
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# Copyright (C) 2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# Path to example in apps/examples containing the user_start entry point
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CONFIGURED_APPS += examples/nsh
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# The NSH application library
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CONFIGURED_APPS += nshlib
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CONFIGURED_APPS += system/readline
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File diff suppressed because it is too large
Load Diff
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#!/bin/bash
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# configs/aerocore/nsh/setenv.sh
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# nuttx-configs/aerocore/nsh/setenv.sh
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#
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# Copyright (C) 2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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/****************************************************************************
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* configs/aerocore/common/ld.script
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* nuttx-configs/aerocore/scripts/ld.script
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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@ -1,5 +1,4 @@
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############################################################################
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# configs/aerocore/src/Makefile
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#
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# Copyright (C) 2011 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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$(call DELFILE, Make.dep)
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$(call DELFILE, .depend)
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ifneq ($(BOARD_CONTEXT),y)
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context:
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endif
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-include Make.dep
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@ -35,6 +35,7 @@ px4_add_module(
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COMPILE_FLAGS
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SRCS
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../common/board_name.c
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../common/board_dma_alloc.c
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aerocore_init.c
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aerocore_timer_config.c
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aerocore_spi.c
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/****************************************************************************
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*
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* Copyright (C) 2012 PX4 Development Team. All rights reserved.
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* Copyright (c) 2012-2015 PX4 Development Team. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* @file aerocore_init.c
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*
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* AeroCore-specific early startup code. This file implements the
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* nsh_archinitialize() function that is called early by nsh during startup.
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* board_app_initialize() function that is called early by nsh during startup.
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*
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* Code here is run before the rcS script is invoked; it should start required
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* subsystems and perform board-specific initialisation.
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* subsystems and perform board-specific initialization.
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*/
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/****************************************************************************
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#include <errno.h>
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#include <nuttx/arch.h>
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#include <nuttx/spi.h>
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#include <nuttx/i2c.h>
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#include <nuttx/board.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/i2c/i2c_master.h>
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#include <nuttx/mmcsd.h>
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#include <nuttx/analog/adc.h>
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#include <nuttx/gran.h>
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#include <stm32.h>
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#include "board_config.h"
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#include <systemlib/cpuload.h>
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#include <systemlib/perf_counter.h>
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#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
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#include <systemlib/systemlib.h>
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#endif
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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#ifdef CONFIG_CPP_HAVE_VARARGS
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# ifdef CONFIG_DEBUG
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# define message(...) lowsyslog(__VA_ARGS__)
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# define message(...) syslog(__VA_ARGS__)
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# else
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# define message(...) printf(__VA_ARGS__)
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# endif
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#else
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# ifdef CONFIG_DEBUG
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# define message lowsyslog
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# define message syslog
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# else
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# define message printf
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# endif
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@ -110,72 +114,10 @@ __END_DECLS
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* Protected Functions
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****************************************************************************/
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#if defined(CONFIG_FAT_DMAMEMORY)
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# if !defined(CONFIG_GRAN) || !defined(CONFIG_FAT_DMAMEMORY)
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# error microSD DMA support requires CONFIG_GRAN
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# endif
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static GRAN_HANDLE dma_allocator;
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/*
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* The DMA heap size constrains the total number of things that can be
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* ready to do DMA at a time.
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*
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* For example, FAT DMA depends on one sector-sized buffer per filesystem plus
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* one sector-sized buffer per file.
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*
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* We use a fundamental alignment / granule size of 64B; this is sufficient
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* to guarantee alignment for the largest STM32 DMA burst (16 beats x 32bits).
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*/
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static uint8_t g_dma_heap[8192] __attribute__((aligned(64)));
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static perf_counter_t g_dma_perf;
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static void
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dma_alloc_init(void)
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{
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dma_allocator = gran_initialize(g_dma_heap,
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sizeof(g_dma_heap),
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7, /* 128B granule - must be > alignment (XXX bug?) */
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6); /* 64B alignment */
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if (dma_allocator == NULL) {
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message("DMA alloc FAILED");
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} else {
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g_dma_perf = perf_alloc(PC_COUNT, "dma_alloc");
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}
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/*
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* DMA-aware allocator stubs for the FAT filesystem.
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*/
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__EXPORT void *fat_dma_alloc(size_t size);
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__EXPORT void fat_dma_free(FAR void *memory, size_t size);
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void *
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fat_dma_alloc(size_t size)
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{
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perf_count(g_dma_perf);
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return gran_alloc(dma_allocator, size);
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}
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void
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fat_dma_free(FAR void *memory, size_t size)
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{
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gran_free(dma_allocator, memory, size);
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}
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#else
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# define dma_alloc_init()
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#endif
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/************************************************************************************
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* Name: stm32_boardinitialize
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*
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@ -189,46 +131,65 @@ fat_dma_free(FAR void *memory, size_t size)
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__EXPORT void
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stm32_boardinitialize(void)
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{
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/* configure ADC pins */
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stm32_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
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stm32_configgpio(GPIO_ADC1_IN11); /* J1 breakout */
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stm32_configgpio(GPIO_ADC1_IN12); /* J1 breakout */
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stm32_configgpio(GPIO_ADC1_IN13); /* J1 breakout */
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/* configure SPI interfaces */
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stm32_spiinitialize();
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/* configure LEDs */
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up_ledinit();
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board_autoled_initialize();
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}
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/****************************************************************************
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* Name: nsh_archinitialize
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* Name: board_app_initialize
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*
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* Description:
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* Perform architecture specific initialization
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* Perform application specific initialization. This function is never
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* called directly from application code, but only indirectly via the
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* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
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*
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* Input Parameters:
|
||||
* arg - The boardctl() argument is passed to the board_app_initialize()
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* implementation without modification. The argument has no
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* meaning to NuttX; the meaning of the argument is a contract
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* between the board-specific initalization logic and the the
|
||||
* matching application logic. The value cold be such things as a
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* mode enumeration value, a set of DIP switch switch settings, a
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* pointer to configuration data read from a file or serial FLASH,
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* or whatever you would like to do with it. Every implementation
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* should accept zero/NULL as a default configuration.
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*
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* Returned Value:
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* Zero (OK) is returned on success; a negated errno value is returned on
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||||
* any failure to indicate the nature of the failure.
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||||
*
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||||
****************************************************************************/
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static struct spi_dev_s *spi3;
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static struct spi_dev_s *spi4;
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#include <math.h>
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||||
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||||
#ifdef __cplusplus
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__EXPORT int matherr(struct __exception *e)
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__EXPORT int board_app_initialize(uintptr_t arg)
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||||
{
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||||
return 1;
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||||
}
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||||
#else
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||||
__EXPORT int matherr(struct exception *e)
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||||
{
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return 1;
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||||
}
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||||
#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
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/* run C++ ctors before we go any further */
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||||
up_cxxinitialize();
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||||
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||||
# if defined(CONFIG_EXAMPLES_NSH_CXXINITIALIZE)
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# error CONFIG_EXAMPLES_NSH_CXXINITIALIZE Must not be defined! Use CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE.
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# endif
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__EXPORT int nsh_archinitialize(void)
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{
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#else
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# error platform is dependent on c++ both CONFIG_HAVE_CXX and CONFIG_HAVE_CXXINITIALIZE must be defined.
|
||||
#endif
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/* configure ADC pins */
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px4_arch_configgpio(GPIO_ADC1_IN10); /* used by VBUS valid */
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||||
px4_arch_configgpio(GPIO_ADC1_IN11); /* J1 breakout */
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px4_arch_configgpio(GPIO_ADC1_IN12); /* J1 breakout */
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px4_arch_configgpio(GPIO_ADC1_IN13); /* J1 breakout */
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||||
/* configure the high-resolution time/callout interface */
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hrt_init();
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@ -236,6 +197,10 @@ __EXPORT int nsh_archinitialize(void)
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/* configure the DMA allocator */
|
||||
dma_alloc_init();
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||||
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||||
if (board_dma_alloc_init() < 0) {
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||||
message("DMA alloc FAILED");
|
||||
}
|
||||
|
||||
/* configure CPU load estimation */
|
||||
#ifdef CONFIG_SCHED_INSTRUMENTATION
|
||||
cpuload_initialize_once();
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@ -263,11 +228,12 @@ __EXPORT int nsh_archinitialize(void)
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|||
led_off(LED_AMBER);
|
||||
|
||||
/* Configure Sensors on SPI bus #3 */
|
||||
|
||||
spi3 = px4_spibus_initialize(3);
|
||||
|
||||
if (!spi3) {
|
||||
message("[boot] FAILED to initialize SPI port 3\n");
|
||||
up_ledon(LED_AMBER);
|
||||
board_autoled_on(LED_AMBER);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
@ -282,11 +248,12 @@ __EXPORT int nsh_archinitialize(void)
|
|||
message("[boot] Initialized SPI port 3 (SENSORS)\n");
|
||||
|
||||
/* Configure FRAM on SPI bus #4 */
|
||||
|
||||
spi4 = px4_spibus_initialize(4);
|
||||
|
||||
if (!spi4) {
|
||||
message("[boot] FAILED to initialize SPI port 4\n");
|
||||
up_ledon(LED_AMBER);
|
||||
board_autoled_on(LED_AMBER);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
|
|
@ -63,19 +63,19 @@ __END_DECLS
|
|||
|
||||
__EXPORT void led_init()
|
||||
{
|
||||
px4_arch_configgpio(GPIO_LED0);
|
||||
px4_arch_configgpio(GPIO_LED1);
|
||||
stm32_configgpio(GPIO_LED0);
|
||||
stm32_configgpio(GPIO_LED1);
|
||||
}
|
||||
|
||||
__EXPORT void led_on(int led)
|
||||
{
|
||||
switch (led) {
|
||||
case 0:
|
||||
px4_arch_gpiowrite(GPIO_LED0, true);
|
||||
stm32_gpiowrite(GPIO_LED0, true);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
px4_arch_gpiowrite(GPIO_LED1, true);
|
||||
stm32_gpiowrite(GPIO_LED1, true);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -87,11 +87,11 @@ __EXPORT void led_off(int led)
|
|||
{
|
||||
switch (led) {
|
||||
case 0:
|
||||
px4_arch_gpiowrite(GPIO_LED0, false);
|
||||
stm32_gpiowrite(GPIO_LED0, false);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
px4_arch_gpiowrite(GPIO_LED1, false);
|
||||
stm32_gpiowrite(GPIO_LED1, false);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -103,21 +103,21 @@ __EXPORT void led_toggle(int led)
|
|||
{
|
||||
switch (led) {
|
||||
case 0:
|
||||
if (px4_arch_gpioread(GPIO_LED0)) {
|
||||
px4_arch_gpiowrite(GPIO_LED0, false);
|
||||
if (stm32_gpioread(GPIO_LED0)) {
|
||||
stm32_gpiowrite(GPIO_LED0, false);
|
||||
|
||||
} else {
|
||||
px4_arch_gpiowrite(GPIO_LED0, true);
|
||||
stm32_gpiowrite(GPIO_LED0, true);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (px4_arch_gpioread(GPIO_LED1)) {
|
||||
px4_arch_gpiowrite(GPIO_LED1, false);
|
||||
if (stm32_gpioread(GPIO_LED1)) {
|
||||
stm32_gpiowrite(GPIO_LED1, false);
|
||||
|
||||
} else {
|
||||
px4_arch_gpiowrite(GPIO_LED1, true);
|
||||
stm32_gpiowrite(GPIO_LED1, true);
|
||||
}
|
||||
|
||||
break;
|
||||
|
|
|
@ -47,7 +47,7 @@
|
|||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/spi.h>
|
||||
#include <nuttx/spi/spi.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include <up_arch.h>
|
||||
|
@ -70,36 +70,36 @@
|
|||
__EXPORT void stm32_spiinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
px4_arch_configgpio(GPIO_SPI1_NSS);
|
||||
px4_arch_gpiowrite(GPIO_SPI1_NSS, 1);
|
||||
stm32_configgpio(GPIO_SPI1_NSS);
|
||||
stm32_gpiowrite(GPIO_SPI1_NSS, 1);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI2
|
||||
px4_arch_configgpio(GPIO_SPI2_NSS);
|
||||
px4_arch_gpiowrite(GPIO_SPI2_NSS, 1);
|
||||
stm32_configgpio(GPIO_SPI2_NSS);
|
||||
stm32_gpiowrite(GPIO_SPI2_NSS, 1);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI3
|
||||
px4_arch_configgpio(GPIO_SPI_CS_GYRO);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_ACCEL_MAG);
|
||||
px4_arch_configgpio(GPIO_SPI_CS_BARO);
|
||||
stm32_configgpio(GPIO_SPI_CS_GYRO);
|
||||
stm32_configgpio(GPIO_SPI_CS_ACCEL_MAG);
|
||||
stm32_configgpio(GPIO_SPI_CS_BARO);
|
||||
|
||||
/* De-activate all peripherals,
|
||||
* required for some peripheral
|
||||
* state machines
|
||||
*/
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
|
||||
px4_arch_configgpio(GPIO_EXTI_GYRO_DRDY);
|
||||
px4_arch_configgpio(GPIO_EXTI_MAG_DRDY);
|
||||
px4_arch_configgpio(GPIO_EXTI_ACCEL_DRDY);
|
||||
stm32_configgpio(GPIO_EXTI_GYRO_DRDY);
|
||||
stm32_configgpio(GPIO_EXTI_MAG_DRDY);
|
||||
stm32_configgpio(GPIO_EXTI_ACCEL_DRDY);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI4
|
||||
px4_arch_configgpio(GPIO_SPI4_NSS);
|
||||
px4_arch_gpiowrite(GPIO_SPI4_NSS, 1);
|
||||
stm32_configgpio(GPIO_SPI4_NSS);
|
||||
stm32_gpiowrite(GPIO_SPI4_NSS, 1);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
@ -107,7 +107,7 @@ __EXPORT void stm32_spiinitialize(void)
|
|||
__EXPORT void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
{
|
||||
/* there is only one device broken-out so select it */
|
||||
px4_arch_gpiowrite(GPIO_SPI1_NSS, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI1_NSS, !selected);
|
||||
}
|
||||
|
||||
__EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
|
@ -120,7 +120,7 @@ __EXPORT uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
|
|||
__EXPORT void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
{
|
||||
/* there is only one device broken-out so select it */
|
||||
px4_arch_gpiowrite(GPIO_SPI2_NSS, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI2_NSS, !selected);
|
||||
}
|
||||
|
||||
__EXPORT uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
|
@ -137,23 +137,23 @@ __EXPORT void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid,
|
|||
switch (devid) {
|
||||
case PX4_SPIDEV_GYRO:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_ACCEL_MAG:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, 1);
|
||||
break;
|
||||
|
||||
case PX4_SPIDEV_BARO:
|
||||
/* Making sure the other peripherals are not selected */
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
px4_arch_gpiowrite(GPIO_SPI_CS_BARO, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_GYRO, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_ACCEL_MAG, 1);
|
||||
stm32_gpiowrite(GPIO_SPI_CS_BARO, !selected);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -172,7 +172,7 @@ __EXPORT uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devi
|
|||
__EXPORT void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
|
||||
{
|
||||
/* there can only be one device on this bus, so always select it */
|
||||
px4_arch_gpiowrite(GPIO_SPI4_NSS, !selected);
|
||||
stm32_gpiowrite(GPIO_SPI4_NSS, !selected);
|
||||
}
|
||||
|
||||
__EXPORT uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
|
|
|
@ -47,10 +47,6 @@
|
|||
#include <nuttx/compiler.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include <stm32.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#define UDID_START 0x1FFF7A10
|
||||
|
||||
/****************************************************************************************************
|
||||
* Definitions
|
||||
|
@ -215,25 +211,6 @@ extern void stm32_spiinitialize(void);
|
|||
|
||||
#define board_peripheral_reset(ms)
|
||||
|
||||
/****************************************************************************
|
||||
* Name: nsh_archinitialize
|
||||
*
|
||||
* Description:
|
||||
* Perform architecture specific initialization for NSH.
|
||||
*
|
||||
* CONFIG_NSH_ARCHINIT=y :
|
||||
* Called from the NSH library
|
||||
*
|
||||
* CONFIG_BOARD_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
|
||||
* CONFIG_NSH_ARCHINIT=n :
|
||||
* Called from board_initialize().
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_NSH_LIBRARY
|
||||
int nsh_archinitialize(void);
|
||||
#endif
|
||||
|
||||
#include "../common/board_common.h"
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
|
Loading…
Reference in New Issue