forked from Archive/PX4-Autopilot
Updates for PIC32MX USB driver
git-svn-id: https://nuttx.svn.sourceforge.net/svnroot/nuttx/trunk@4233 7fd9a85b-ad96-42d3-883c-3090e2eb8679
This commit is contained in:
patacongo
parent
50eddba2ce
commit
269fd5a9cc
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@ -2300,3 +2300,6 @@
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6.14 2012-xx-xx Gregory Nutt <gnutt@nuttx.org>
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* tools/Makefile.txport, mkexport.sh, and configure.sh. Changes submitted
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by Mike Smith to support configuration and 'make export' on MAC OS.
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10
nuttx/TODO
10
nuttx/TODO
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@ -1,4 +1,4 @@
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NuttX TODO List (Last updated December 20, 2011)
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NuttX TODO List (Last updated December 27, 2011)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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This file summarizes known NuttX bugs, limitations, inconsistencies with
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@ -31,7 +31,7 @@ nuttx/
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(2) ARM/LPC313x (arch/arm/src/lpc313x/)
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(3) ARM/STR71x (arch/arm/src/str71x/)
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(3) ARM/LM3S6918 (arch/arm/src/lm3s/)
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(4) ARM/STM32 (arch/arm/src/stm32/)
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(5) ARM/STM32 (arch/arm/src/stm32/)
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(3) AVR (arch/avr)
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(0) Intel x86 (arch/x86)
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(4) 8051 / MCS51 (arch/8051/)
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@ -1072,6 +1072,12 @@ o ARM/STM32 (arch/arm/src/stm32/)
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Priority: Low until someone needs DMA1, Channel 5 (ADC3, UART4_TX, TIM5_CH1, or
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TIM8_CH2).
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Title: UNFINISHED DRIVERS
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Description: The following drivers are incomplete: DAC. The following drivers
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are untested: DMA on the F4, CAN.
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Status: Open
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Priority: Medium
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o AVR (arch/avr)
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^^^^^^^^^^^^^^
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@ -57,7 +57,7 @@
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/* GPIO settings used in the configport, readport, writeport, etc.
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*
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* General encoding:
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* MMxV Ixxx RRRx PPPP
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* MMxV IIxx RRRx PPPP
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*/
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#define GPIO_MODE_SHIFT (14) /* Bits 14-15: I/O mode */
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@ -70,7 +70,7 @@
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# define GPIO_VALUE_ONE (1 << 12)
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# define GPIO_VALUE_ZERO (0)
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#define GPIO_INT_SHIFT (14) /* Bits 10-11: Interrupt mode */
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#define GPIO_INT_SHIFT (10) /* Bits 10-11: Interrupt mode */
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#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT)
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# define GPIO_INT_NONE (0 << GPIO_INT_SHIFT) /* Bit 00: No interrupt */
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# define GPIO_INT (1 << GPIO_INT_SHIFT) /* Bit 01: Change notification enable */
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@ -70,7 +70,7 @@
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#define PIC32MX_USB_BDTP3_OFFSET 0x02d0 /* USB Buffer Descriptor Table Pointer Register 3 */
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#define PIC32MX_USB_CNFG1_OFFSET 0x02e0 /* USB Debug and Idle Register */
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#define PIC32MX_USB_EP_OFFSET(n) 0x0300 /* USB Endpoint n Control Register */
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#define PIC32MX_USB_EP_OFFSET(n) (0x0300+((n)<<4))
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#define PIC32MX_USB_EP0_OFFSET 0x0300 /* USB Endpoint 0 Control Register */
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#define PIC32MX_USB_EP1_OFFSET 0x0310 /* USB Endpoint 1 Control Register */
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#define PIC32MX_USB_EP2_OFFSET 0x0320 /* USB Endpoint 2 Control Register */
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@ -184,6 +184,8 @@
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#define USB_INT_ATTACH (1 << 6) /* Bit 6: Peripheral Attach Interrupt */
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#define USB_INT_STALL (1 << 7) /* Bit 7: STALL Handshake Interrupt */
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#define USB_INT_ALL 0xff
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/* USB Pending Error Interrupt Register */
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/* USB Interrupt Error Enable Register */
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@ -197,6 +199,8 @@
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#define USB_EINT_BMX (1 << 6) /* Bit 6: Bus Matrix Error Flag */
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#define USB_EINT_BTS (1 << 7) /* Bit 7: Bit Stuff Error Flag */
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#define USB_EINT_ALL 0xff
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/* USB Status FIFO Register */
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#define USB_STAT_PPBI (1 << 2) /* Bit 2: Ping-Pong BD Pointer Indicator */
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@ -277,18 +281,51 @@
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#define USB_EP_EPHSHK (1 << 0) /* Bit 0: Endpoint Handshake Enable */
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#define USB_EP_EPSTALL (1 << 1) /* Bit 1: Endpoint Stall Status */
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#define USB_EP_EPRXEN (1 << 3) /* Bit 3: Endpoint Receive Enable */
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#define USB_EP_EPTXEN (1 << 2) /* Bit 2: Endpoint Transmit Enable */
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#define USB_EP_EPRXEN (1 << 3) /* Bit 3: Endpoint Receive Enable */
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#define USB_EP_EPCONDIS (1 << 4) /* Bit 4: Bidirectional Endpoint Control */
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#define USB_EP_RETRYDIS (1 << 6) /* Bit 6: Retry Disable (Host mode and U1EP0 only) */
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#define USB_EP_LSPD (1 << 7) /* Bit 7: Low-Speed Direct Connection Enable */
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/* Buffer Descriptor Table (BDT) ****************************************************/
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/* Offset 0: On write (software->hardware) */
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#define USB_BDT_BSTALL (1 << 2) /* Bit 2: Buffer Stall Enable bit */
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#define USB_BDT_DTS (1 << 3) /* Bit 3: Data Toggle Synchronization Enable bit */
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#define USB_BDT_NINC (1 << 4) /* Bit 4: DMA Address Increment Disable bit */
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#define USB_BDT_KEEP (1 << 5) /* Bit 5: BD Keep Enable bit */
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#define USB_BDT_DATA01 (1 << 6) /* Bit 6: Data Toggle Packet bit */
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#define USB_BDT_UOWN (1 << 7) /* Bit 7: USB Own bit */
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#define USB_BDT_BYTECOUNT_SHIFT (16) /* Bits 16-25: Byte Count bits */
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#define USB_BDT_BYTECOUNT_MASK (0x3ff << USB_BDT_BYTECOUNT_SHIFT)
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#define USB_BDT_DATA0 0 /* DATA0 packet expected next */
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#define USB_BDT_DATA1 USB_BDT_DATA01 /* DATA1 packet expected next */
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#define USB_BDT_COWN 0 /* CPU owns the descriptor */
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/* Offset 0: On read (hardware->software) */
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#define USB_BDT_PID_SHIFT (2) /* Bits 2-5: Packet Identifier bits */
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#define USB_BDT_PID_MASK (15 << USB_BDT_BYTECOUNT_SHIFT)
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/* Bit 7: USB Own bit (same) */
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/* Bits 16-25: Byte Count bits (same) */
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/* Offset 4: BUFFER_ADDRESS, 32-bit Buffer Address bits */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/* Buffer Descriptor Status Register layout. */
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struct usbotg_bdtentry_s
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{
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uint32_t status; /* Status, byte count, and PID */
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uint8_t *addr; /* Buffer address */
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};
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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@ -48,6 +48,10 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
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CSRCS += up_buttons.c
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endif
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ifeq ($(CONFIG_PIC32MX_USBDEV),y)
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CSRCS += up_usbdev.c
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endif
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ifeq ($(CONFIG_NSH_ARCHINIT),y)
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CSRCS += up_nsh.c
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endif
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@ -2,7 +2,7 @@
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* configs/sure-pic32mx/src/sure-internal.h
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -81,7 +81,7 @@ extern "C" {
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* Name: pic32mx_spiinitialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the PCB Logic board.
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* Called to configure SPI chip select GPIO pins for the Sure PIC32MX Logic board.
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*
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************************************************************************************/
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@ -89,6 +89,18 @@ extern "C" {
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EXTERN void weak_function pic32mx_spiinitialize(void);
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#endif
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/************************************************************************************
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* Name: pic32mx_usdbinitialize
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*
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* Description:
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* Called to configure the mini-B PHY on the Sure PIC32MX board for the USB device
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*
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************************************************************************************/
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#if defined(CONFIG_PIC32MX_USBDEV)
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EXTERN void weak_function pic32mx_usdbinitialize(void);
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#endif
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/************************************************************************************
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* Name: pic32mx_ledinit
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*
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}
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#endif
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/* Configure the mini-B PHY on the Sure PIC32MX board for the USB device */
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#if defined(CONFIG_PIC32MX_USBDEV)
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if (pic32mx_usbdevinitialize)
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{
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pic32mx_usbdevinitialize();
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}
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#endif
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/* Configure on-board LEDs if LED support has been selected. */
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#ifdef CONFIG_ARCH_LEDS
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@ -1,9 +1,9 @@
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/************************************************************************************
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* configs/sure-pic32mx/src/up_ssp.c
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* arch/arm/src/board/up_ssp.c
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* configs/sure-pic32mx/src/up_spi.c
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* arch/arm/src/board/up_spi.c
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -65,16 +65,16 @@
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*/
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#ifdef CONFIG_SPI_DEBUG
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# define sspdbg lldbg
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# define spidbg lldbg
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# ifdef CONFIG_SPI_VERBOSE
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# define sspvdbg lldbg
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# define spivdbg lldbg
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# else
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# define sspvdbg(x...)
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# define spivdbg(x...)
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# endif
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#else
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# undef CONFIG_SPI_VERBOSE
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# define sspdbg(x...)
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# define sspvdbg(x...)
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# define spidbg(x...)
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# define spivdbg(x...)
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#endif
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/************************************************************************************
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************************************************************************************/
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/************************************************************************************
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* Name: pic32mx_sspinitialize
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* Name: pic32mx_spiinitialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the Sure PIC32MX board.
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*
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************************************************************************************/
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void weak_function pic32mx_sspinitialize(void)
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void weak_function pic32mx_spiinitialize(void)
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{
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/* Configure the SPI2 chip select GPIOs */
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@ -130,13 +130,13 @@ void weak_function pic32mx_sspinitialize(void)
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#ifdef CONFIG_PIC32MX_SPI2
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void pic32mx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
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{
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sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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#warning "Missing logic"
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}
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uint8_t pic32mx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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sspdbg("Returning nothing\n");
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spidbg("Returning nothing\n");
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#warning "Missing logic"
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return 0;
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}
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@ -165,4 +165,10 @@ if [ ! -z "${appdir}" ]; then
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echo "CONFIG_APPS_DIR=\"$appdir\"" >> "${TOPDIR}/.configX"
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fi
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fi
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# install the final .configX only if it differs from the existing
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# .config file.
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install -C "${TOPDIR}/.configX" "${TOPDIR}/.config"
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rm -f "${TOPDIR}/.configX"
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