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Add an ARM ELF header file
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5262 42af7a65-404d-4744-a932-0658087f49c3
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/****************************************************************************
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* arch/arm/include/syscall.h
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Reference: "ELF for the ARM® Architecture," ARM IHI 0044D, current through
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* ABI release 2.08, October 28, 2009, ARM Limited.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_ELF_H
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#define __ARCH_ARM_INCLUDE_ELF_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* 4.3.1 ELF Identification. Should have:
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*
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* e_machine = EM_ARM
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* e_ident[EI_CLASS] = ELFCLASS32
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* e_ident[EI_DATA] = ELFDATA2LSB (little endian) or ELFDATA2MSB (big endian)
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*/
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#if 0 /* Defined in include/elf.h */
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#define EM_ARM 40
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#endif
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/* Table 4-2, ARM-specific e_flags */
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#define EF_ARM_EABI_MASK 0xff000000
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#define EF_ARM_EABI_UNKNOWN 0x00000000
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#define EF_ARM_EABI_VER1 0x01000000
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#define EF_ARM_EABI_VER2 0x02000000
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#define EF_ARM_EABI_VER3 0x03000000
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#define EF_ARM_EABI_VER4 0x04000000
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#define EF_ARM_EABI_VER5 0x05000000
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#define EF_ARM_BE8 0x00800000
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/* Table 4-4, Processor specific section types */
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#define SHT_ARM_EXIDX 0x70000001 /* Exception Index table */
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#define SHT_ARM_PREEMPTMAP 0x70000002 /* BPABI DLL dynamic linking pre-emption map */
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#define SHT_ARM_ATTRIBUTES 0x70000003 /* Object file compatibility attributes */
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#define SHT_ARM_DEBUGOVERLAY 0x70000004
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#define SHT_ARM_OVERLAYSECTION 0x70000005
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/* 4.7.1 Relocation codes
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*
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* S (when used on its own) is the address of the symbol.
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* A is the addend for the relocation.
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* P is the address of the place being relocated (derived from r_offset).
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* Pa is the adjusted address of the place being relocated, defined as (P & 0xFFFFFFFC).
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* T is 1 if the target symbol S has type STT_FUNC and the symbol addresses a Thumb instruction;
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* it is 0 otherwise.
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* B(S) is the addressing origin of the output segment defining the symbol S.
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* GOT_ORG is the addressing origin of the Global Offset Table
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* GOT(S) is the address of the GOT entry for the symbol S.
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*/
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#define R_ARM_NONE 0 /* No relocation */
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#define R_ARM_PC24 1 /* ARM ((S + A) | T) - P */
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#define R_ARM_ABS32 2 /* Data (S + A) | T */
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#define R_ARM_REL32 3 /* Data ((S + A) | T) - P */
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#define R_ARM_LDR_PC_G0 4 /* ARM S + A - P */
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#define R_ARM_ABS16 5 /* Data S + A */
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#define R_ARM_ABS12 6 /* ARM S + A */
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#define R_ARM_THM_ABS5 7 /* Thumb16 S + A */
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#define R_ARM_ABS8 8 /* Data S + A */
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#define R_ARM_SBREL32 9 /* Data ((S + A) | T) - B(S) */
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#define R_ARM_THM_CALL 10 /* Thumb32 ((S + A) | T) - P */
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#define R_ARM_THM_PC8 11 /* Thumb16 S + A - Pa */
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#define R_ARM_BREL_ADJ 12 /* Data ?B(S) + A */
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#define R_ARM_TLS_DESC 13 /* Data */
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#define R_ARM_THM_SWI8 14 /* Obsolete */
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#define R_ARM_XPC25 15 /* Obsolete */
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#define R_ARM_THM_XPC22 16 /* Obsolete */
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#define R_ARM_TLS_DTPMOD32 17 /* Data Module[S] */
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#define R_ARM_TLS_DTPOFF32 18 /* Data S + A - TLS */
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#define R_ARM_TLS_TPOFF32 19 /* Data S + A - tp */
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#define R_ARM_COPY 20 /* Miscellaneous */
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#define R_ARM_GLOB_DAT 21 /* Data (S + A) | T */
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#define R_ARM_JUMP_SLOT 22 /* Data (S + A) | T */
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#define R_ARM_RELATIVE 23 /* Data B(S) + A */
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#define R_ARM_GOTOFF32 24 /* Data ((S + A) | T) - GOT_ORG */
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#define R_ARM_BASE_PREL 25 /* Data B(S) + A - P */
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#define R_ARM_GOT_BREL 26 /* Data GOT(S) + A - GOT_ORG */
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#define R_ARM_PLT32 27 /* ARM ((S + A) | T) - P */
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#define R_ARM_CALL 28 /* ARM ((S + A) | T) - P */
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#define R_ARM_JUMP24 29 /* ARM ((S + A) | T) - P */
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#define R_ARM_THM_JUMP24 30 /* Thumb32 ((S + A) | T) - P */
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#define R_ARM_BASE_ABS 31 /* Data B(S) + A */
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#define R_ARM_ALU_PCREL_7_0 32 /* Obsolete */
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#define R_ARM_ALU_PCREL_15_8 33 /* Obsolete */
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#define R_ARM_ALU_PCREL_23_15 34 /* Obsolete */
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#define R_ARM_LDR_SBREL_11_0_NC 35 /* ARM S + A - B(S) */
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#define R_ARM_ALU_SBREL_19_12_NC 36 /* ARM S + A - B(S) */
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#define R_ARM_ALU_SBREL_27_20_CK 37 /* ARM S + A - B(S) */
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#define R_ARM_TARGET1 38 /* Miscellaneous (S + A) | T or ((S + A) | T) - P */
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#define R_ARM_SBREL31 39 /* Data ((S + A) | T) - B(S) */
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#define R_ARM_V4BX 40 /* Miscellaneous */
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#define R_ARM_TARGET2 41 /* Miscellaneous */
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#define R_ARM_PREL31 42 /* Data ((S + A) | T) - P */
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#define R_ARM_MOVW_ABS_NC 43 /* ARM (S + A) | T */
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#define R_ARM_MOVT_ABS 44 /* ARM S + A */
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#define R_ARM_MOVW_PREL_NC 45 /* ARM ((S + A) | T) - P */
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#define R_ARM_MOVT_PREL 46 /* ARM S + A - P */
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#define R_ARM_THM_MOVW_ABS_NC 47 /* Thumb32 (S + A) | T */
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#define R_ARM_THM_MOVT_ABS 48 /* Thumb32 S + A */
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#define R_ARM_THM_MOVW_PREL_NC 49 /* Thumb32 ((S + A) | T) - P */
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#define R_ARM_THM_MOVT_PREL 50 /* Thumb32 S + A - P */
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#define R_ARM_THM_JUMP19 51 /* Thumb32 ((S + A) | T) - P */
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#define R_ARM_THM_JUMP6 52 /* Thumb16 S + A - P */
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#define R_ARM_THM_ALU_PREL_11_0 53 /* Thumb32 ((S + A) | T) - Pa */
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#define R_ARM_THM_PC12 54 /* Thumb32 S + A - Pa */
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#define R_ARM_ABS32_NOI 55 /* Data S + A */
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#define R_ARM_REL32_NOI 56 /* Data S + A - P */
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#define R_ARM_ALU_PC_G0_NC 57 /* ARM ((S + A) | T) - P */
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#define R_ARM_ALU_PC_G0 58 /* ARM ((S + A) | T) - P */
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#define R_ARM_ALU_PC_G1_NC 59 /* ARM ((S + A) | T) - P */
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#define R_ARM_ALU_PC_G1 60 /* ARM ((S + A) | T) - P */
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#define R_ARM_ALU_PC_G2 61 /* ARM ((S + A) | T) - P */
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#define R_ARM_LDR_PC_G1 62 /* ARM S + A - P */
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#define R_ARM_LDR_PC_G2 63 /* ARM S + A - P */
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#define R_ARM_LDRS_PC_G0 64 /* ARM S + A - P */
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#define R_ARM_LDRS_PC_G1 65 /* ARM S + A - P */
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#define R_ARM_LDRS_PC_G2 66 /* ARM S + A - P */
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#define R_ARM_LDC_PC_G0 67 /* ARM S + A - P */
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#define R_ARM_LDC_PC_G1 68 /* ARM S + A - P */
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#define R_ARM_LDC_PC_G2 69 /* ARM S + A - P */
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#define R_ARM_ALU_SB_G0_NC 70 /* ARM ((S + A) | T) - B(S) */
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#define R_ARM_ALU_SB_G0 71 /* ARM ((S + A) | T) - B(S) */
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#define R_ARM_ALU_SB_G1_NC 72 /* ARM ((S + A) | T) - B(S) */
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#define R_ARM_ALU_SB_G1 73 /* ARM ((S + A) | T) - B(S) */
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#define R_ARM_ALU_SB_G2 74 /* ARM ((S + A) | T) - B(S) */
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#define R_ARM_LDR_SB_G0 75 /* ARM S + A - B(S) */
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#define R_ARM_LDR_SB_G1 76 /* ARM S + A - B(S) */
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#define R_ARM_LDR_SB_G2 77 /* ARM S + A - B(S) */
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#define R_ARM_LDRS_SB_G0 78 /* ARM S + A - B(S) */
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#define R_ARM_LDRS_SB_G1 79 /* ARM S + A - B(S) */
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#define R_ARM_LDRS_SB_G2 80 /* ARM S + A - B(S) */
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#define R_ARM_LDC_SB_G0 81 /* ARM S + A - B(S) */
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#define R_ARM_LDC_SB_G1 82 /* ARM S + A - B(S) */
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#define R_ARM_LDC_SB_G2 83 /* ARM S + A - B(S) */
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#define R_ARM_MOVW_BREL_NC 84 /* ARM ((S + A) | T) - B(S) */
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#define R_ARM_MOVT_BREL 85 /* ARM S + A - B(S) */
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#define R_ARM_MOVW_BREL 86 /* ARM ((S + A) | T) - B(S) */
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#define R_ARM_THM_MOVW_BREL_NC 87 /* Thumb32 ((S + A) | T) - B(S) */
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#define R_ARM_THM_MOVT_BREL 88 /* Thumb32 S + A - B(S) */
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#define R_ARM_THM_MOVW_BREL 89 /* Thumb32 ((S + A) | T) - B(S) */
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#define R_ARM_TLS_GOTDESC 90 /* Data */
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#define R_ARM_TLS_CALL 91 /* ARM */
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#define R_ARM_TLS_DESCSEQ 92 /* ARM TLS relaxation */
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#define R_ARM_THM_TLS_CALL 93 /* Thumb32 */
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#define R_ARM_PLT32_ABS 94 /* Data PLT(S) + A */
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#define R_ARM_GOT_ABS 95 /* Data GOT(S) + A */
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#define R_ARM_GOT_PREL 96 /* Data GOT(S) + A - P */
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#define R_ARM_GOT_BREL12 97 /* ARM GOT(S) + A - GOT_ORG */
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#define R_ARM_GOTOFF12 98 /* ARM S + A - GOT_ORG */
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#define R_ARM_GOTRELAX 99 /* Miscellaneous */
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#define R_ARM_GNU_VTENTRY 100 /* Data */
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#define R_ARM_GNU_VTINHERIT 101 /* Data */
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#define R_ARM_THM_JUMP11 102 /* Thumb16 S + A - P */
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#define R_ARM_THM_JUMP8 103 /* Thumb16 S + A - P */
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#define R_ARM_TLS_GD32 104 /* Data GOT(S) + A - P */
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#define R_ARM_TLS_LDM32 105 /* Data GOT(S) + A - P */
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#define R_ARM_TLS_LDO32 106 /* Data S + A - TLS */
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#define R_ARM_TLS_IE32 107 /* Data GOT(S) + A - P */
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#define R_ARM_TLS_LE32 108 /* Data S + A - tp */
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#define R_ARM_TLS_LDO12 109 /* ARM S + A - TLS */
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#define R_ARM_TLS_LE12 110 /* ARM S + A - tp */
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#define R_ARM_TLS_IE12GP 111 /* ARM GOT(S) + A - GOT_ORG */
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#define R_ARM_ME_TOO 128 /* Obsolete */
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#define R_ARM_THM_TLS_DESCSEQ16 129 /* Thumb16 */
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#define R_ARM_THM_TLS_DESCSEQ32 130 /* Thumb32 */
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/* 5.2.1 Platform architecture compatibility data */
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#define PT_ARM_ARCHEXT_FMTMSK 0xff000000
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#define PT_ARM_ARCHEXT_PROFMSK 0x00ff0000
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#define PT_ARM_ARCHEXT_ARCHMSK 0x000000ff
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#define PT_ARM_ARCHEXT_FMT_OS 0x00000000
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#define PT_ARM_ARCHEXT_FMT_ABI 0x01000000
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#define PT_ARM_ARCHEXT_PROF_NONE 0x00000000
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#define PT_ARM_ARCHEXT_PROF_ARM 0x00410000
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#define PT_ARM_ARCHEXT_PROF_RT 0x00520000
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#define PT_ARM_ARCHEXT_PROF_MC 0x004d0000
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#define PT_ARM_ARCHEXT_PROF_CLASSIC 0x00530000
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#define PT_ARM_ARCHEXT_ARCH_UNKNOWN 0x00
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#define PT_ARM_ARCHEXT_ARCHv4 0x01
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#define PT_ARM_ARCHEXT_ARCHv4T 0x02
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#define PT_ARM_ARCHEXT_ARCHv5T 0x03
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#define PT_ARM_ARCHEXT_ARCHv5TE 0x04
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#define PT_ARM_ARCHEXT_ARCHv5TEJ 0x05
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#define PT_ARM_ARCHEXT_ARCHv6 0x06
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#define PT_ARM_ARCHEXT_ARCHv6KZ 0x07
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#define PT_ARM_ARCHEXT_ARCHv6T2 0x08
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#define PT_ARM_ARCHEXT_ARCHv6K 0x09
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#define PT_ARM_ARCHEXT_ARCHv7 0x0a
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#define PT_ARM_ARCHEXT_ARCHv6M 0x0b
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#define PT_ARM_ARCHEXT_ARCHv6SM 0x0c
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#define PT_ARM_ARCHEXT_ARCHv7EM 0x0d
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/* Table 5-6, ARM-specific dynamic array tags */
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#define DT_ARM_RESERVED1 0x70000000
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#define DT_ARM_SYMTABSZ 0x70000001
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#define DT_ARM_PREEMPTMAP 0x70000002
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#define DT_ARM_RESERVED2 0x70000003
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#endif /* __ARCH_ARM_INCLUDE_ELF_H */
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@ -65,7 +65,9 @@
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#define ET_LOPROC 0xff00 /* Processor-specific */
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#define ET_HIPROC 0xffff /* Processor-specific */
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/* Values for Elf32_Ehdr::e_machine */
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/* Values for Elf32_Ehdr::e_machine (most of this were not included in the
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* original SCO document but have been gleaned from elsewhere).
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*/
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#define EM_NONE 0 /* No machine */
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#define EM_M32 1 /* AT&T WE 32100 */
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@ -81,6 +83,7 @@
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#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
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#define EM_PPC 20 /* PowerPC */
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#define EM_PPC64 21 /* PowerPC64 */
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#define EM_ARM 40 /* ARM */
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#define EM_SH 42 /* SuperH */
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#define EM_SPARCV9 43 /* SPARC v9 64-bit */
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#define EM_IA_64 50 /* HP/Intel IA-64 */
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