forked from Archive/PX4-Autopilot
Implement I2C slave DMA. Not working yet.
This commit is contained in:
px4dev
parent
f12fa7ee06
commit
0dab53ae26
132
apps/px4io/i2c.c
132
apps/px4io/i2c.c
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@ -42,6 +42,7 @@
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include <stm32_i2c.h>
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#include <stm32_dma.h>
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#define DEBUG
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#include "px4io.h"
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@ -63,30 +64,54 @@
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#define rCCR REG(STM32_I2C_CCR_OFFSET)
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#define rTRISE REG(STM32_I2C_TRISE_OFFSET)
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static int i2c_interrupt(int irq, void *context);
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static void i2c_dump(void);
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static int i2c_interrupt(int irq, void *context);
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static void i2c_dump(void);
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static void i2c_rx_setup(void);
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static void i2c_tx_setup(void);
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static void i2c_rx_complete(DMA_HANDLE handle, uint8_t status, void *arg);
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static void i2c_tx_complete(DMA_HANDLE handle, uint8_t status, void *arg);
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static DMA_HANDLE rx_dma;
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static DMA_HANDLE tx_dma;
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uint8_t rx_buf[64];
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unsigned rx_len;
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uint8_t tx_buf[64];
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unsigned tx_len;
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void
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i2c_init(void)
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{
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// enable the i2c block clock and reset it
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debug("i2c init");
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/* allocate DMA handles and initialise DMA */
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rx_dma = stm32_dmachannel(DMACHAN_I2C1_RX);
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i2c_rx_setup();
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tx_dma = stm32_dmachannel(DMACHAN_I2C1_TX);
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i2c_tx_setup();
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/* enable the i2c block clock and reset it */
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modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_I2C1EN);
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modifyreg32(STM32_RCC_APB1RSTR, 0, RCC_APB1RSTR_I2C1RST);
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modifyreg32(STM32_RCC_APB1RSTR, RCC_APB1RSTR_I2C1RST, 0);
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// configure the i2c GPIOs
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/* configure the i2c GPIOs */
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stm32_configgpio(GPIO_I2C1_SCL);
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stm32_configgpio(GPIO_I2C1_SDA);
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// soft-reset the block
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/* soft-reset the block */
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rCR1 |= I2C_CR1_SWRST;
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rCR1 = 0;
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// set the frequency value in CR2
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/* set for DMA operation */
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rCR2 |= I2C_CR2_ITEVFEN | I2C_CR2_DMAEN;
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/* set the frequency value in CR2 */
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rCR2 &= ~I2C_CR2_FREQ_MASK;
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rCR2 |= STM32_PCLK1_FREQUENCY / 1000000;
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// set divisor and risetime for fast mode
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/* set divisor and risetime for fast mode */
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uint16_t result = STM32_PCLK1_FREQUENCY / (400000 * 25);
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if (result < 1)
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result = 1;
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@ -95,15 +120,14 @@ i2c_init(void)
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rCCR |= I2C_CCR_DUTY | I2C_CCR_FS | result;
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rTRISE = (uint16_t)((((STM32_PCLK1_FREQUENCY / 1000000) * 300) / 1000) + 1);
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// set our device address
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/* set our device address */
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rOAR1 = 0x1a << 1;
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// enable event interrupts
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/* enable event interrupts */
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irq_attach(STM32_IRQ_I2C1EV, i2c_interrupt);
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up_enable_irq(STM32_IRQ_I2C1EV);
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rCR2 |= I2C_CR2_ITEVFEN;
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// and enable the I2C port
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/* and enable the I2C port */
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rCR1 |= I2C_CR1_ACK | I2C_CR1_PE;
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i2c_dump();
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@ -114,22 +138,46 @@ i2c_interrupt(int irq, FAR void *context)
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{
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uint16_t sr1 = rSR1;
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// XXX not sure what else we need to do here...
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/* XXX not sure what else we need to do here... */
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if (sr1 & I2C_SR1_ERRORMASK) {
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//debug("errors 0x%04x", sr1 & I2C_SR1_ERRORMASK);
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//i2c_dump();
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rSR1 = 0;
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}
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#if 1
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if (sr1 & I2C_SR1_ADDR) {
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/* XXX we have been addressed, set up to receive */
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/* disable event interrupts since the DMA will be handling the transfer */
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rCR2 &= ~I2C_CR2_ITEVFEN;
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/* clear ADDR */
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/* clear ADDR to ack our selection and get direction */
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uint16_t sr2 = rSR2;
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debug("addr");
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if (sr2 & I2C_SR2_TRA) {
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/* we are the transmitter */
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debug("tx");
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stm32_dmastart(tx_dma, i2c_tx_complete, NULL, false);
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} else {
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/* we are the receiver */
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debug("rx");
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stm32_dmastart(rx_dma, i2c_rx_complete, NULL, false);
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}
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}
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#else
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if (sr1 & I2C_SR1_ADDR) {
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/* clear ADDR to ack our selection and get direction */
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(void)rSR2;
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debug("addr");
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}
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#endif
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if (sr1 & I2C_SR1_RXNE) {
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@ -148,6 +196,62 @@ i2c_interrupt(int irq, FAR void *context)
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return 0;
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}
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static void
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i2c_rx_setup(void)
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{
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rx_len = 0;
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stm32_dmasetup(rx_dma, (uintptr_t)&rDR, (uintptr_t)&rx_buf[0], sizeof(rx_buf),
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DMA_CCR_MINC |
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DMA_CCR_PSIZE_8BITS |
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DMA_CCR_MSIZE_8BITS |
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DMA_CCR_PRIMED);
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}
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static void
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i2c_rx_complete(DMA_HANDLE handle, uint8_t status, void *arg)
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{
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debug("dma rx %u", status);
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rx_len = sizeof(rx_buf) - stm32_dmaresidual(rx_dma);
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debug("len %u", rx_len);
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/* XXX handle reception */
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i2c_rx_setup();
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/* re-enable event interrupts */
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rCR2 |= I2C_CR2_ITEVFEN;
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}
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static void
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i2c_tx_setup(void)
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{
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tx_len = 0;
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stm32_dmasetup(tx_dma, (uintptr_t)&rDR, (uintptr_t)&tx_buf[0], sizeof(tx_buf),
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DMA_CCR_DIR |
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DMA_CCR_MINC |
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DMA_CCR_PSIZE_8BITS |
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DMA_CCR_MSIZE_8BITS |
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DMA_CCR_PRIMED);
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}
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static void
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i2c_tx_complete(DMA_HANDLE handle, uint8_t status, void *arg)
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{
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debug("dma tx %u", status);
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tx_len = sizeof(tx_buf) - stm32_dmaresidual(tx_dma);
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debug("len %u", tx_len);
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/* XXX handle reception */
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i2c_rx_setup();
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/* re-enable event interrupts */
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rCR2 |= I2C_CR2_ITEVFEN;
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}
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static void
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i2c_dump(void)
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{
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