forked from Archive/PX4-Autopilot
STM32 ADC driver fixes
git-svn-id: http://svn.code.sf.net/p/nuttx/code/trunk@5247 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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6ea7967d8a
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096397d49f
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@ -3496,3 +3496,8 @@
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optimized for size.
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* lib/strings/lib_memset.c: CONFIG_MEMSET_64BIT will perform 64-bit
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aligned memset() operations.
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* arch/arm/src/stm32/stm32_adc.c: Need to put the ADC back into the
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initial reset in the open/setup logic. Opening the ADC driver works
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the first time, but not the second because the device is left in a
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powered down state on the last close.
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@ -694,10 +694,10 @@ static int adc_timinit(FAR struct stm32_dev_s *priv)
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case 4: /* TimerX TRGO event */
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{
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#warning "TRGO support not yet implemented"
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/* TODO: TRGO support not yet implemented */
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/* Set the event TRGO */
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ccenable = 0;
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egr = GTIM_EGR_TG;
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/* Set the duty cycle by writing to the CCR register for this channel */
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@ -971,7 +971,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
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avdbg("intf: ADC%d\n", priv->intf);
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flags = irqsave();
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/* Enable ADC reset state */
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/* Enable ADC reset state */
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adc_rccreset(priv, true);
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@ -1164,6 +1164,10 @@ static int adc_setup(FAR struct adc_dev_s *dev)
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ret = irq_attach(priv->irq, priv->isr);
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if (ret == OK)
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{
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/* Make sure that the ADC device is in the powered up, reset state */
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adc_reset(dev);
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/* Enable the ADC interrupt */
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avdbg("Enable the ADC interrupt: irq=%d\n", priv->irq);
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@ -287,7 +287,7 @@
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#if defined(ADC1_HAVE_TIMER) || defined(ADC2_HAVE_TIMER) || defined(ADC3_HAVE_TIMER)
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# define ADC_HAVE_TIMER 1
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# if defined(CONFIG_STM32_STM32F10XX) && defined(CONFIG_STM32_FORCEPOWER)
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# if defined(CONFIG_STM32_STM32F10XX) && !defined(CONFIG_STM32_FORCEPOWER)
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# warning "CONFIG_STM32_FORCEPOWER must be defined to enable the timer(s)"
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# endif
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#else
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@ -593,6 +593,12 @@ Shenzhou-specific Configuration Options
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CONFIG_STM32_ADC1
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CONFIG_STM32_ADC2
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Timer and I2C devices may need to the following to force power to be applied
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unconditionally at power up. (Otherwise, the device is powered when it is
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initialized).
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CONFIG_STM32_FORCEPOWER
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
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is defined (as above) then the following may also be defined to indicate that
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@ -798,6 +804,7 @@ Where <subdir> is one of the following:
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CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1
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CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz
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CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0
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CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time
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CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in
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nxwm
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@ -143,7 +143,7 @@ static int adc_open(FAR struct file *filep)
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dev->ad_recv.af_head = 0;
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dev->ad_recv.af_tail = 0;
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/* Finally, Enable the CAN RX interrupt */
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/* Finally, Enable the ADC RX interrupt */
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dev->ad_ops->ao_rxint(dev, true);
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@ -151,9 +151,11 @@ static int adc_open(FAR struct file *filep)
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dev->ad_ocount = tmp;
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}
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irqrestore(flags);
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}
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}
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sem_post(&dev->ad_closesem);
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}
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return ret;
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@ -370,6 +372,10 @@ static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: adc_receive
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****************************************************************************/
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int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
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{
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FAR struct adc_fifo_s *fifo = &dev->ad_recv;
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@ -390,7 +396,7 @@ int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
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if (nexttail != fifo->af_head)
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{
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/* Add the new, decoded CAN message at the tail of the FIFO */
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/* Add the new, decoded ADC sample at the tail of the FIFO */
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fifo->af_buffer[fifo->af_tail].am_channel = ch;
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fifo->af_buffer[fifo->af_tail].am_data = data;
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@ -403,11 +409,16 @@ int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data)
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{
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sem_post(&fifo->af_sem);
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}
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err = OK;
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}
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return err;
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}
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/****************************************************************************
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* Name: adc_register
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****************************************************************************/
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int adc_register(FAR const char *path, FAR struct adc_dev_s *dev)
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{
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/* Initialize the ADC device structure */
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