Andrew Tridgell
a945c97ec6
HAL_ChibiOS: fixed 3-way DMA sharing bug
...
when we have 3 way contention across two DMA streams we could get the
dma_deallocate function called in an object from two places at
once. This adds a mutex that prevents that scenario
2018-06-06 07:15:41 +10:00
Andrew Tridgell
0e09dc75c0
HAL_ChibiOS: flush all memory on chSysHalt()
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this makes debugging a lot easier, as gdb can see the values in dcache
2018-06-06 07:15:41 +10:00
Andrew Tridgell
2493cdbcb6
HAL_ChibiOS: switch to new bouncebuffer system
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this removes the dma_flush and dma_invalidate methods and uses a
common bouncebuffer system for all CPU types. This enables microSD
support on STM32F7
2018-06-06 07:15:41 +10:00
Andrew Tridgell
0b1e26a470
HAL_ChibiOS: added bouncebuffer system
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this makes our bouncebuffers available for ChibiOS system
drivers. This is needed for SDMMCv1 on STM32F7
2018-06-06 07:15:41 +10:00
Andrew Tridgell
56ce3f057d
HAL_ChibiOS: added DRDY and SDMMC pins for FMUv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
018c9ad40b
HAL_ChibiOS: fixed build warnings
2018-06-06 07:15:41 +10:00
Andrew Tridgell
f25b95f287
HAL_ChibiOS: fixed array length in ADC debug code
2018-06-06 07:15:41 +10:00
Andrew Tridgell
fef1b0ffc6
HAL_ChibiOS: fixed I2C flush/invalidate calls
2018-06-06 07:15:41 +10:00
Andrew Tridgell
0fade4eb9e
HAL_ChibiOS: make sure the UART bounce buffers are DMA safe
2018-06-06 07:15:41 +10:00
Andrew Tridgell
eec4a12cc2
HAL_ChibiOS: switched to using DTCM memory for DMA
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this uses SRAM1 and SRAM2 for main memory, which enables the use of the
data cache for faster operation, and using DTCM for all DMA operations.
2018-06-06 07:15:41 +10:00
Andrew Tridgell
8b1db792ee
HAL_ChibiOS: ensure ADC memory is aligned for DMA access
2018-06-06 07:15:41 +10:00
Andrew Tridgell
bb2e7a189f
HAL_ChibiOS: added a debug function for showing stack free
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this can be enabled when needed to investigate stack space remaining
2018-06-06 07:15:41 +10:00
Andrew Tridgell
010cd71ab6
HAL_ChibiOS: enable CAN on FMUv5
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and fixed voltage scaling defaults
2018-06-06 07:15:41 +10:00
Andrew Tridgell
2087354939
HAL_ChibiOS: align buffers to STM32F7 cache lines
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this allows for DMA flush and invalidate operations to work on all
dynamically allocated memory
2018-06-06 07:15:41 +10:00
Andrew Tridgell
762e4f9915
HAL_ChibiOS: fixed dma priorities for fmuv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
77d95f6744
HAL_ChibiOS: fmuv5 tweaks
2018-06-06 07:15:41 +10:00
Andrew Tridgell
a220220758
HAL_ChibiOS: added comment on IS_DMA_SAFE()
2018-06-06 07:15:41 +10:00
Andrew Tridgell
4d4ea894e8
HAL_ChibiOS: disable i2c device debug code
2018-06-06 07:15:41 +10:00
Andrew Tridgell
edb831653f
HAL_ChibiOS: added dma_flush and dma_invalidate operations
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these are needed to manage the data cache on the STM32F7
2018-06-06 07:15:41 +10:00
Andrew Tridgell
7449e15313
HAL_ChibiOS: disable flash storage option on FMUv5
...
F7 flash driver not working yet
2018-06-06 07:15:41 +10:00
Andrew Tridgell
b961e12456
HAL_ChibiOS: support having no flash storage option
2018-06-06 07:15:41 +10:00
Andrew Tridgell
2d8748ddce
HAL_ChibiOS: enable ADCs and buzzer for fmuv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
6aab9232ef
HAL_ChibiOS: enable aux pwm channels on FMUv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
db9bf19e46
HAL_ChibiOS: enable i2c for FMUv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
77bb69fa2e
HAL_ChibiOS: enabled UARTs for FMUv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
ac44189ab2
HAL_ChibiOS: setup two IMUs for FMUv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
721f3cd5d1
HAL_ChibiOS: fixed flash layout for F7
...
thanks to @alielectric
2018-06-06 07:15:41 +10:00
Andrew Tridgell
01f5d1a17c
HAL_ChibiOS: first IMU working
2018-06-06 07:15:41 +10:00
Andrew Tridgell
eca634ec62
HAL_ChibiOS: support 6 SPI buses
2018-06-06 07:15:41 +10:00
Andrew Tridgell
4ad757b4d1
HAL_ChibiOS: fixed pincount for F7
2018-06-06 07:15:41 +10:00
Andrew Tridgell
876899c48d
HAL_ChibiOS: baro and FRAM working for fmuv5
2018-06-06 07:15:41 +10:00
Andrew Tridgell
8d2f57898b
HAL_ChibiOS: adjust pin counts for STM32F7
2018-06-06 07:15:41 +10:00
Andrew Tridgell
1f6ffc48e5
HAL_ChibiOS: allow STM32F7 to build with flash driver
2018-06-06 07:15:41 +10:00
Andrew Tridgell
7c09a1781b
HAL_ChibiOS: started on fmuv5
2018-06-06 07:15:41 +10:00
Michael du Breuil
593da25a7a
AP_HAL_ChibiOS: Remove RC overrides
2018-06-05 09:51:09 +10:00
Andrew Tridgell
a011561a6a
HAL_ChibiOS: support sdcard on MatekF405
2018-05-27 19:10:24 +10:00
Andrew Tridgell
ea37cede28
HAL_ChibiOS: stop sdcard interface on reboot
2018-05-27 19:10:24 +10:00
Andrew Tridgell
86ded2c40c
HAL_ChibiOS: cleanup sdcard API usage
2018-05-27 19:10:24 +10:00
Andrew Tridgell
52c8d3ed9f
HAL_ChibiOS: fixed SPI select error
...
changes by sdcard PR
2018-05-27 19:10:24 +10:00
Andrew Tridgell
2c55589488
HAL_ChibiOS: added hwdef for MatekF405
2018-05-27 19:10:24 +10:00
Alexander Malishev
83e65b3c6e
HAL_ChibiOS: turn on sdcard on f4by
2018-05-27 19:10:24 +10:00
Alexander Malishev
66de6d770a
HAL_ChibiOS: Enable reentrancy on FatFS sybsystem
2018-05-27 19:10:24 +10:00
Alexander Malishev
6b15b2f44f
HAL_ChibiOS: Enable sdcard on spi bus
2018-05-27 19:10:24 +10:00
Andrew Tridgell
7b720aae46
HAL_ChibiOS: allow printf() to work on systems without debug console
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map to hal.console once initialised
2018-05-26 19:06:25 +10:00
Andrew Tridgell
dbe0f3c575
HAL_ChibiOS: fixed assert in reboot
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with asserts enabled we can't sleep with interrupts off
2018-05-26 17:23:46 +10:00
Andrew Tridgell
79ca1e76c0
HAL_ChibiOS: improve reliability of reboot
2018-05-26 15:53:25 +10:00
Andrew Tridgell
7e897c16c0
HAL_ChibiOS: maintain rcout state beyond BRD_PWM_COUNT
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allow channels beyond BRD_PWM_COUNT to be sent over SBUS or DShot
distribution
2018-05-26 12:08:54 +10:00
Andrew Tridgell
afb36ec168
HAL_ChibiOS: run can loop much more often
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this allows for much higher ESC and servo rates, as it gives more
changes for frames to get out
2018-05-25 13:53:17 +10:00
Michael du Breuil
3a62bca7d0
AP_HAL_ChibiOS: Make redefined pins an error, fix FMUv3
2018-05-25 09:57:18 +10:00
Andrew Tridgell
f3179e7934
HAL_ChibiOS: improved reliability of DShot passthru
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thanks to WickedShell for debugging this on his Wraith32 ESCs. We were
truncating the last bit on some BLHeli transfers
2018-05-22 18:59:51 +10:00