AP_IOMCU: implement DSM bind
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184c05bc70
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f8dc17f8ff
@ -168,6 +168,10 @@ void AP_IOMCU_FW::init()
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adc_init();
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adc_init();
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sbus_out_init();
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sbus_out_init();
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// power on spektrum port
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palSetLineMode(HAL_GPIO_PIN_SPEKTRUM_PWR_EN, PAL_MODE_OUTPUT_PUSHPULL);
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palSetLine(HAL_GPIO_PIN_SPEKTRUM_PWR_EN);
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// we do no allocations after setup completes
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// we do no allocations after setup completes
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reg_status.freemem = hal.util->available_memory();
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reg_status.freemem = hal.util->available_memory();
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}
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}
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@ -227,6 +231,9 @@ void AP_IOMCU_FW::update()
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safety_update();
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safety_update();
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rcout_mode_update();
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rcout_mode_update();
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hal.rcout->timer_tick();
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hal.rcout->timer_tick();
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if (dsm_bind_state) {
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dsm_bind_step();
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}
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}
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}
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}
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}
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@ -470,6 +477,7 @@ bool AP_IOMCU_FW::handle_code_write()
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palSetLine(HAL_GPIO_PIN_SBUS_OUT_EN);
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palSetLine(HAL_GPIO_PIN_SBUS_OUT_EN);
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}
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}
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break;
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break;
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case PAGE_REG_SETUP_HEATER_DUTY_CYCLE:
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case PAGE_REG_SETUP_HEATER_DUTY_CYCLE:
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reg_setup.heater_duty_cycle = rx_io_packet.regs[0];
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reg_setup.heater_duty_cycle = rx_io_packet.regs[0];
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last_heater_ms = last_ms;
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last_heater_ms = last_ms;
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@ -492,6 +500,10 @@ bool AP_IOMCU_FW::handle_code_write()
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reg_setup.ignore_safety = rx_io_packet.regs[0];
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reg_setup.ignore_safety = rx_io_packet.regs[0];
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((ChibiOS::RCOutput *)hal.rcout)->set_safety_mask(reg_setup.ignore_safety);
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((ChibiOS::RCOutput *)hal.rcout)->set_safety_mask(reg_setup.ignore_safety);
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break;
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break;
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case PAGE_REG_SETUP_DSM_BIND:
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dsm_bind_state = 1;
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break;
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default:
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default:
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break;
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break;
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@ -663,6 +675,58 @@ void AP_IOMCU_FW::fill_failsafe_pwm(void)
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}
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}
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}
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}
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/*
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perform a DSM bind operation
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*/
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void AP_IOMCU_FW::dsm_bind_step(void)
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{
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uint32_t now = last_ms;
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switch (dsm_bind_state) {
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case 1:
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palSetLineMode(HAL_GPIO_PIN_SPEKTRUM_PWR_EN, PAL_MODE_OUTPUT_PUSHPULL);
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palClearLine(HAL_GPIO_PIN_SPEKTRUM_PWR_EN);
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palSetLineMode(HAL_GPIO_PIN_SPEKTRUM_OUT, PAL_MODE_OUTPUT_PUSHPULL);
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palSetLine(HAL_GPIO_PIN_SPEKTRUM_OUT);
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dsm_bind_state = 2;
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last_dsm_bind_ms = now;
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break;
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case 2:
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if (now - last_dsm_bind_ms >= 500) {
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palSetLine(HAL_GPIO_PIN_SPEKTRUM_PWR_EN);
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dsm_bind_state = 3;
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last_dsm_bind_ms = now;
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}
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break;
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case 3: {
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if (now - last_dsm_bind_ms >= 72) {
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// 9 pulses works with all satellite receivers, and supports the highest
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// available protocol
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const uint8_t num_pulses = 9;
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for (uint8_t i=0; i<num_pulses; i++) {
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hal.scheduler->delay_microseconds(120);
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palClearLine(HAL_GPIO_PIN_SPEKTRUM_OUT);
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hal.scheduler->delay_microseconds(120);
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palSetLine(HAL_GPIO_PIN_SPEKTRUM_OUT);
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}
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last_dsm_bind_ms = now;
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dsm_bind_state = 4;
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}
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break;
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}
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case 4:
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if (now - last_dsm_bind_ms >= 50) {
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// set back as alternate function with pullup for UART input
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palSetLineMode(HAL_GPIO_PIN_SPEKTRUM_OUT, PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetLine(HAL_GPIO_PIN_SPEKTRUM_OUT);
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dsm_bind_state = 0;
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}
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break;
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}
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}
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AP_HAL_MAIN();
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AP_HAL_MAIN();
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@ -35,6 +35,7 @@ private:
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uint16_t mix_output_angle(uint8_t channel, int16_t angle) const;
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uint16_t mix_output_angle(uint8_t channel, int16_t angle) const;
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uint16_t mix_output_range(uint8_t channel, int16_t value) const;
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uint16_t mix_output_range(uint8_t channel, int16_t value) const;
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int16_t mix_elevon_vtail(int16_t angle1, int16_t angle2, bool first_output) const;
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int16_t mix_elevon_vtail(int16_t angle1, int16_t angle2, bool first_output) const;
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void dsm_bind_step(void);
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struct PACKED {
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struct PACKED {
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/* default to RSSI ADC functionality */
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/* default to RSSI ADC functionality */
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@ -128,5 +129,7 @@ private:
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uint32_t last_status_ms;
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uint32_t last_status_ms;
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uint32_t last_ms;
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uint32_t last_ms;
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uint32_t loop_counter;
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uint32_t loop_counter;
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uint8_t dsm_bind_state;
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uint32_t last_dsm_bind_ms;
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};
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};
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