HAL_AVR: Improved AVRTimer micros() and millis()
- More efficient code by using 16-bit timer - micros() now has proper 1 us resolution and less overhead - millis() has less overhead - removed unneeded/unwanted initializatin of timers in AVRTimer::init()
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@ -65,16 +65,27 @@ void APM1RCInput::init(void* _isrregistry) {
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* OCR4A: 40000, 0.5us tick => 2ms period / 50hz freq for outbound
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* OCR4A: 40000, 0.5us tick => 2ms period / 50hz freq for outbound
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* fast PWM.
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* fast PWM.
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*/
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*/
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TCCR4A = _BV(WGM40) | _BV(WGM41);
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TCCR4B = _BV(WGM43) | _BV(WGM42) | _BV(CS41) | _BV(ICES4);
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OCR4A = 40000;
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/* OCR4B and OCR4C will be used by RCOutput_APM1. init to nil output */
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uint8_t oldSREG = SREG;
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cli();
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/* Timer cleanup before configuring */
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TCNT4 = 0;
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TIFR4 = 0;
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/* Set timer 8x prescaler fast PWM mode toggle compare at OCRA with rising edge input capture */
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TCCR4A = _BV(WGM40) | _BV(WGM41);
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TCCR4B |= _BV(WGM43) | _BV(WGM42) | _BV(CS41) | _BV(ICES4);
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OCR4A = 40000 - 1; // -1 to correct for wrap
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/* OCR4B and OCR4C will be used by RCOutput_APM1. Init to 0xFFFF to prevent premature PWM output */
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OCR4B = 0xFFFF;
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OCR4B = 0xFFFF;
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OCR4C = 0xFFFF;
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OCR4C = 0xFFFF;
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/* Enable input capture interrupt */
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/* Enable input capture interrupt */
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TIMSK4 |= _BV(ICIE4);
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TIMSK4 |= _BV(ICIE4);
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SREG = oldSREG;
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}
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}
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uint8_t APM1RCInput::valid_channels() { return _valid_channels; }
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uint8_t APM1RCInput::valid_channels() { return _valid_channels; }
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@ -91,9 +102,10 @@ uint16_t APM1RCInput::read(uint8_t ch) {
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/* constrain ch */
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/* constrain ch */
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if (ch >= AVR_RC_INPUT_NUM_CHANNELS) return 0;
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if (ch >= AVR_RC_INPUT_NUM_CHANNELS) return 0;
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/* grab channel from isr's memory in critical section*/
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/* grab channel from isr's memory in critical section*/
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uint8_t oldSREG = SREG;
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cli();
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cli();
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uint16_t capt = _pulse_capt[ch];
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uint16_t capt = _pulse_capt[ch];
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sei();
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SREG = oldSREG;
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_valid_channels = 0;
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_valid_channels = 0;
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/* scale _pulse_capt from 0.5us units to 1us units. */
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/* scale _pulse_capt from 0.5us units to 1us units. */
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uint16_t pulse = constrain_pulse(capt >> 1);
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uint16_t pulse = constrain_pulse(capt >> 1);
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@ -106,11 +118,12 @@ uint8_t APM1RCInput::read(uint16_t* periods, uint8_t len) {
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/* constrain len */
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/* constrain len */
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if (len > AVR_RC_INPUT_NUM_CHANNELS) { len = AVR_RC_INPUT_NUM_CHANNELS; }
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if (len > AVR_RC_INPUT_NUM_CHANNELS) { len = AVR_RC_INPUT_NUM_CHANNELS; }
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/* grab channels from isr's memory in critical section */
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/* grab channels from isr's memory in critical section */
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uint8_t oldSREG = SREG;
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cli();
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cli();
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for (uint8_t i = 0; i < len; i++) {
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for (uint8_t i = 0; i < len; i++) {
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periods[i] = _pulse_capt[i];
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periods[i] = _pulse_capt[i];
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}
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}
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sei();
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SREG = oldSREG;
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/* Outside of critical section, do the math (in place) to scale and
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/* Outside of critical section, do the math (in place) to scale and
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* constrain the pulse. */
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* constrain the pulse. */
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for (uint8_t i = 0; i < len; i++) {
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for (uint8_t i = 0; i < len; i++) {
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@ -65,16 +65,27 @@ void APM2RCInput::init(void* _isrregistry) {
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* OCR5A: 40000, 0.5us tick => 2ms period / 50hz freq for outbound
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* OCR5A: 40000, 0.5us tick => 2ms period / 50hz freq for outbound
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* fast PWM.
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* fast PWM.
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*/
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*/
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TCCR5A = _BV(WGM50) | _BV(WGM51);
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TCCR5B = _BV(WGM53) | _BV(WGM52) | _BV(CS51) | _BV(ICES5);
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OCR5A = 40000;
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/* OCR5B and OCR5C will be used by RCOutput_APM2. init to nil output */
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uint8_t oldSREG = SREG;
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cli();
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/* Timer cleanup before configuring */
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TCNT5 = 0;
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TIFR5 = 0;
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/* Set timer 8x prescaler fast PWM mode toggle compare at OCRA with rising edge input capture */
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TCCR5A = _BV(WGM50) | _BV(WGM51);
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TCCR5B |= _BV(WGM53) | _BV(WGM52) | _BV(CS51) | _BV(ICES5);
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OCR5A = 40000 - 1; // -1 to correct for wrap
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/* OCR5B and OCR5C will be used by RCOutput_APM2. Init to 0xFFFF to prevent premature PWM output */
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OCR5B = 0xFFFF;
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OCR5B = 0xFFFF;
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OCR5C = 0xFFFF;
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OCR5C = 0xFFFF;
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/* Enable input capture interrupt */
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/* Enable input capture interrupt */
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TIMSK5 |= _BV(ICIE5);
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TIMSK5 |= _BV(ICIE5);
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SREG = oldSREG;
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}
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}
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uint8_t APM2RCInput::valid_channels() { return _valid_channels; }
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uint8_t APM2RCInput::valid_channels() { return _valid_channels; }
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@ -91,9 +102,10 @@ uint16_t APM2RCInput::read(uint8_t ch) {
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/* constrain ch */
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/* constrain ch */
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if (ch >= AVR_RC_INPUT_NUM_CHANNELS) return 0;
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if (ch >= AVR_RC_INPUT_NUM_CHANNELS) return 0;
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/* grab channel from isr's memory in critical section*/
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/* grab channel from isr's memory in critical section*/
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uint8_t oldSREG = SREG;
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cli();
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cli();
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uint16_t capt = _pulse_capt[ch];
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uint16_t capt = _pulse_capt[ch];
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sei();
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SREG = oldSREG;
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_valid_channels = 0;
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_valid_channels = 0;
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/* scale _pulse_capt from 0.5us units to 1us units. */
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/* scale _pulse_capt from 0.5us units to 1us units. */
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uint16_t pulse = constrain_pulse(capt >> 1);
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uint16_t pulse = constrain_pulse(capt >> 1);
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@ -106,11 +118,12 @@ uint8_t APM2RCInput::read(uint16_t* periods, uint8_t len) {
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/* constrain len */
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/* constrain len */
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if (len > AVR_RC_INPUT_NUM_CHANNELS) { len = AVR_RC_INPUT_NUM_CHANNELS; }
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if (len > AVR_RC_INPUT_NUM_CHANNELS) { len = AVR_RC_INPUT_NUM_CHANNELS; }
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/* grab channels from isr's memory in critical section */
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/* grab channels from isr's memory in critical section */
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uint8_t oldSREG = SREG;
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cli();
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cli();
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for (int i = 0; i < len; i++) {
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for (int i = 0; i < len; i++) {
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periods[i] = _pulse_capt[i];
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periods[i] = _pulse_capt[i];
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}
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}
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sei();
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SREG = oldSREG;
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/* Outside of critical section, do the math (in place) to scale and
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/* Outside of critical section, do the math (in place) to scale and
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* constrain the pulse. */
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* constrain the pulse. */
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for (int i = 0; i < len; i++) {
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for (int i = 0; i < len; i++) {
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@ -37,8 +37,7 @@ AVRScheduler::AVRScheduler() :
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void AVRScheduler::init(void* _isrregistry) {
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void AVRScheduler::init(void* _isrregistry) {
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ISRRegistry* isrregistry = (ISRRegistry*) _isrregistry;
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ISRRegistry* isrregistry = (ISRRegistry*) _isrregistry;
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/* _timer: sets up timer hardware to Arduino defaults, and
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/* _timer: sets up timer hardware to implement millis & micros. */
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* uses TIMER0 to implement millis & micros */
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_timer.init();
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_timer.init();
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/* TIMER2: Setup the overflow interrupt to occur at 1khz. */
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/* TIMER2: Setup the overflow interrupt to occur at 1khz. */
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@ -50,6 +49,9 @@ void AVRScheduler::init(void* _isrregistry) {
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TIMSK2 = _BV(TOIE2); /* Enable overflow interrupt*/
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TIMSK2 = _BV(TOIE2); /* Enable overflow interrupt*/
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/* Register _timer_isr_event to trigger on overflow */
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/* Register _timer_isr_event to trigger on overflow */
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isrregistry->register_signal(ISR_REGISTRY_TIMER2_OVF, _timer_isr_event);
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isrregistry->register_signal(ISR_REGISTRY_TIMER2_OVF, _timer_isr_event);
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/* Turn on global interrupt flag, AVR interupt system will start from this point */
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sei();
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}
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}
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uint32_t AVRScheduler::micros() {
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uint32_t AVRScheduler::micros() {
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@ -10,47 +10,57 @@ using namespace AP_HAL_AVR;
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#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit))
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#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit))
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#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
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#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit))
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static volatile uint32_t timer0_overflow_count = 0;
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#if (CONFIG_HAL_BOARD == HAL_BOARD_APM1 )
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static volatile uint32_t timer0_millis = 0;
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#define AVR_TIMER_OVF_VECT TIMER4_OVF_vect
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static uint8_t timer0_fract = 0;
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#define AVR_TIMER_TCNT TCNT4
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#define AVR_TIMER_TIFR TIFR4
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#define AVR_TIMER_TCCRA TCCR4A
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#define AVR_TIMER_TCCRB TCCR4B
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#define AVR_TIMER_OCRA OCR4A
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#define AVR_TIMER_TIMSK TIMSK4
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#define AVR_TIMER_TOIE TOIE4
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#define AVR_TIMER_WGM0 WGM40
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#define AVR_TIMER_WGM1 WGM41
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#define AVR_TIMER_WGM2 WGM42
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#define AVR_TIMER_WGM3 WGM43
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#define AVR_TIMER_CS1 CS41
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#elif (CONFIG_HAL_BOARD == HAL_BOARD_APM2 )
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#define AVR_TIMER_OVF_VECT TIMER5_OVF_vect
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#define AVR_TIMER_TCNT TCNT5
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#define AVR_TIMER_TIFR TIFR5
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#define AVR_TIMER_TCCRA TCCR5A
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#define AVR_TIMER_TCCRB TCCR5B
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#define AVR_TIMER_OCRA OCR5A
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#define AVR_TIMER_TIMSK TIMSK5
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#define AVR_TIMER_TOIE TOIE5
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#define AVR_TIMER_WGM0 WGM50
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#define AVR_TIMER_WGM1 WGM51
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#define AVR_TIMER_WGM2 WGM52
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#define AVR_TIMER_WGM3 WGM53
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#define AVR_TIMER_CS1 CS51
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#endif
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static volatile uint32_t timer_micros_counter = 0;
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static volatile uint32_t timer_millis_counter = 0;
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void AVRTimer::init() {
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void AVRTimer::init() {
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// this needs to be called before setup() or some functions won't
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uint8_t oldSREG = SREG;
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// work there
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cli();
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sei();
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// set timer 0 prescale factor to 64
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// this combination is for the standard 168/328/1280/2560
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sbi(TCCR0B, CS01);
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sbi(TCCR0B, CS00);
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// enable timer 0 overflow interrupt
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sbi(TIMSK0, TOIE0);
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// timers 1 and 2 are used for phase-correct hardware pwm
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// Timer cleanup before configuring
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// this is better for motors as it ensures an even waveform
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AVR_TIMER_TCNT = 0;
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// note, however, that fast pwm mode can achieve a frequency of up
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AVR_TIMER_TIFR = 0;
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// 8 MHz (with a 16 MHz clock) at 50% duty cycle
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// Set timer 8x prescaler fast PWM mode toggle compare at OCRA
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AVR_TIMER_TCCRA = _BV( AVR_TIMER_WGM0 ) | _BV( AVR_TIMER_WGM1 );
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AVR_TIMER_TCCRB |= _BV( AVR_TIMER_WGM3 ) | _BV( AVR_TIMER_WGM2 ) | _BV( AVR_TIMER_CS1 );
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AVR_TIMER_OCRA = 40000 - 1; // -1 to correct for wrap
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TCCR1B = 0;
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// Enable overflow interrupt
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AVR_TIMER_TIMSK |= _BV( AVR_TIMER_TOIE );
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// set timer 1 prescale factor to 64
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sbi(TCCR1B, CS11);
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sbi(TCCR1B, CS10);
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// put timer 1 in 8-bit phase correct pwm mode
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sbi(TCCR1A, WGM10);
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sbi(TCCR3B, CS31); // set timer 3 prescale factor to 64
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sbi(TCCR3B, CS30);
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sbi(TCCR3A, WGM30); // put timer 3 in 8-bit phase correct pwm mode
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sbi(TCCR4B, CS41); // set timer 4 prescale factor to 64
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sbi(TCCR4B, CS40);
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sbi(TCCR4A, WGM40); // put timer 4 in 8-bit phase correct pwm mode
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sbi(TCCR5B, CS51); // set timer 5 prescale factor to 64
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sbi(TCCR5B, CS50);
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sbi(TCCR5A, WGM50); // put timer 5 in 8-bit phase correct pwm mode
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// set a2d prescale factor to 128
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// set a2d prescale factor to 128
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// 16 MHz / 128 = 125 KHz, inside the desired 50-200 KHz range.
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// 16 MHz / 128 = 125 KHz, inside the desired 50-200 KHz range.
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// here so they can be used as normal digital i/o; they will be
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// here so they can be used as normal digital i/o; they will be
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// reconnected in Serial.begin()
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// reconnected in Serial.begin()
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UCSR0B = 0;
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UCSR0B = 0;
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SREG = oldSREG;
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}
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}
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#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
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SIGNAL( AVR_TIMER_OVF_VECT)
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#define clockCyclesToMicroseconds(a) ( ((a) * 1000L) / (F_CPU / 1000L) )
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// the prescaler is set so that timer0 ticks every 64 clock cycles, and the
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// the overflow handler is called every 256 ticks.
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#define MICROSECONDS_PER_TIMER0_OVERFLOW (clockCyclesToMicroseconds(64 * 256))
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// the whole number of milliseconds per timer0 overflow
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#define MILLIS_INC (MICROSECONDS_PER_TIMER0_OVERFLOW / 1000)
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// the fractional number of milliseconds per timer0 overflow. we shift right
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// by three to fit these numbers into a byte. (for the clock speeds we care
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// about - 8 and 16 MHz - this doesn't lose precision.)
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#define FRACT_INC ((MICROSECONDS_PER_TIMER0_OVERFLOW % 1000) >> 3)
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#define FRACT_MAX (1000 >> 3)
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SIGNAL(TIMER0_OVF_vect)
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{
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{
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// copy these to local variables so they can be stored in registers
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// Hardcoded for AVR@16MHZ and 8x pre-scale 16-bit timer overflow at 40000
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// (volatile variables must be read from memory on every access)
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timer_micros_counter += 40000 / 2; // 20000us each overflow
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uint32_t m = timer0_millis;
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timer_millis_counter += 40000 / 2000; // 20ms each overlflow
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uint8_t f = timer0_fract;
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m += MILLIS_INC;
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f += FRACT_INC;
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if (f >= FRACT_MAX) {
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f -= FRACT_MAX;
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m += 1;
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}
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timer0_fract = f;
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timer0_millis = m;
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timer0_overflow_count++;
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}
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uint32_t AVRTimer::millis()
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{
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uint32_t m;
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uint8_t oldSREG = SREG;
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// disable interrupts while we read timer0_millis or we might get an
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// inconsistent value (e.g. in the middle of a write to timer0_millis)
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cli();
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m = timer0_millis;
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SREG = oldSREG;
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return m;
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}
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}
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uint32_t AVRTimer::micros() {
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uint32_t AVRTimer::micros() {
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uint32_t m;
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uint8_t oldSREG = SREG;
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uint8_t t;
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uint8_t oldSREG = SREG;
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cli();
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cli();
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m = timer0_overflow_count;
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// Hardcoded for AVR@16MHZ and 8x pre-scale 16-bit timer
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t = TCNT0;
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//uint32_t time_micros = timer_micros_counter + (AVR_TIMER_TCNT / 2);
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//uint32_t time_micros = timer_micros_counter + (AVR_TIMER_TCNT >> 1);
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if ((TIFR0 & _BV(TOV0)) && (t < 255))
|
|
||||||
m++;
|
uint32_t time_micros = timer_micros_counter;
|
||||||
|
uint16_t tcnt = AVR_TIMER_TCNT;
|
||||||
SREG = oldSREG;
|
|
||||||
|
|
||||||
return ((m << 8) + t) * (64 / clockCyclesPerMicrosecond());
|
// Check for imminent timer overflow interrupt and pre-increment counter
|
||||||
|
if ( AVR_TIMER_TIFR & 1 && tcnt < 39999 )
|
||||||
|
{
|
||||||
|
time_micros += 40000 / 2;
|
||||||
|
}
|
||||||
|
SREG = oldSREG;
|
||||||
|
|
||||||
|
return time_micros + (tcnt >> 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
uint32_t AVRTimer::millis() {
|
||||||
|
uint8_t oldSREG = SREG;
|
||||||
|
cli();
|
||||||
|
// Hardcoded for AVR@16MHZ and 8x pre-scale 16-bit timer
|
||||||
|
//uint32_t time_millis = timer_millis_counter + (AVR_TIMER_TCNT / 2000) ;
|
||||||
|
//uint32_t time_millis = timer_millis_counter + (AVR_TIMER_TCNT >> 11); // AVR_TIMER_CNT / 2048 is close enough (24us counter delay)
|
||||||
|
|
||||||
|
uint32_t time_millis = timer_millis_counter;
|
||||||
|
uint16_t tcnt = AVR_TIMER_TCNT;
|
||||||
|
|
||||||
|
// Check for imminent timer overflow interrupt and pre-increment counter
|
||||||
|
if ( AVR_TIMER_TIFR & 1 && tcnt < 39999 )
|
||||||
|
{
|
||||||
|
time_millis += 40000 / 2000;
|
||||||
|
}
|
||||||
|
SREG = oldSREG;
|
||||||
|
|
||||||
|
return time_millis + (tcnt >> 11);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
/* Delay for the given number of microseconds. Assumes a 16 MHz clock. */
|
/* Delay for the given number of microseconds. Assumes a 16 MHz clock. */
|
||||||
void AVRTimer::delay_microseconds(uint16_t us)
|
void AVRTimer::delay_microseconds(uint16_t us)
|
||||||
{
|
{
|
||||||
|
Loading…
Reference in New Issue
Block a user