AP_HAL_ChibiOS: add support for GPIO pins as software CTS
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@ -189,9 +189,9 @@ class ChibiOSHWDef(object):
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return 0
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return None
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if function and function.endswith("_RTS") and (
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if function and (function.endswith("_RTS") or function.endswith("_CTS_GPIO")) and (
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function.startswith('USART') or function.startswith('UART')):
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# we do software RTS
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# we do software RTS and can do either software CTS or hardware CTS
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return None
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for label in self.af_labels:
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@ -1891,6 +1891,8 @@ INCLUDE common.ld
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rts_line_name = dev + '_RTS'
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rts_line = self.make_line(rts_line_name)
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cts_line = self.make_line(dev + '_CTS')
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if cts_line == "0":
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cts_line = self.make_line(dev + '_CTS_GPIO')
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if rts_line != "0":
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have_rts_cts = True
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f.write('#define HAL_HAVE_RTSCTS_SERIAL%u\n' % num)
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@ -2927,12 +2929,12 @@ Please run: Tools/scripts/build_bootloaders.py %s
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if ptype == 'OUTPUT' and re.match(r'US?ART\d+_(TXINV|RXINV)', label):
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return True
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m1 = re.match(r'USART(\d+)', ptype)
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m2 = re.match(r'USART(\d+)_(RX|TX|CTS|RTS)', label)
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m2 = re.match(r'USART(\d+)_(RX|TX|CTS|RTS|CTS_GPIO)', label)
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if (m1 and not m2) or (m2 and not m1) or (m1 and m1.group(1) != m2.group(1)):
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'''usart numbers need to match'''
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return False
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m1 = re.match(r'UART(\d+)', ptype)
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m2 = re.match(r'UART(\d+)_(RX|TX|CTS|RTS)', label)
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m2 = re.match(r'UART(\d+)_(RX|TX|CTS|RTS|CTS_GPIO)', label)
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if (m1 and not m2) or (m2 and not m1) or (m1 and m1.group(1) != m2.group(1)):
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'''uart numbers need to match'''
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return False
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