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HAL_ChibiOS: raise SDMMC clock limit on H7

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this allows for faster log download on ethernet
This commit is contained in:
Andrew Tridgell 2024-01-28 18:13:26 +11:00
parent 8914e5585f
commit e772012e01
1 changed files with 2 additions and 3 deletions
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5
libraries/AP_HAL_ChibiOS/hwdef/common/stm32h7_mcuconf.h
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@ -633,10 +633,9 @@
// limit ISR count per byte
#define STM32_I2C_ISR_LIMIT 6
// limit SDMMC clock to 12.5MHz by default. This increases
// reliability
// limit SDMMC clock to 50MHz by default
#ifndef STM32_SDC_MAX_CLOCK
#define STM32_SDC_MAX_CLOCK 12500000
#define STM32_SDC_MAX_CLOCK 50000000
#endif
#ifndef STM32_WSPI_USE_QUADSPI1