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AP_HAL_ChibiOS: correct SDC power saving

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Andy Piper 2023-02-10 15:15:22 +00:00 committed by Andrew Tridgell
parent 0221b565a5
commit a56a2ec2c1
2 changed files with 3 additions and 3 deletions
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2
libraries/AP_HAL_ChibiOS/hwdef/common/stm32h7_mcuconf.h
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@ -482,7 +482,7 @@
#define STM32_SDC_SDMMC_CLOCK_DELAY 10
#define STM32_SDC_SDMMC1_DMA_PRIORITY 3
#define STM32_SDC_SDMMC1_IRQ_PRIORITY 9
#define STM32_SDC_SDMMC_PWRSAV FALSE
#define STM32_SDC_SDMMC_PWRSAV TRUE
/*
* SERIAL driver system settings.

4
libraries/AP_HAL_ChibiOS/hwdef/scripts/STM32H743xx.py
View File

@ -28,7 +28,7 @@ mcu = {
'RAM_MAP' : [
(0x30000000, 256, 0), # SRAM1, SRAM2
(0x20000000, 128, 2), # DTCM, tightly coupled, no DMA, fast
(0x24000000, 512, 4), # AXI SRAM. Use this for SDMMC IDMA ops
(0x24000000, 512, 4), # AXI SRAM.
(0x00000400, 63, 2), # ITCM (first 1k removed, to keep address 0 unused)
(0x30040000, 32, 0), # SRAM3.
(0x38000000, 64, 1), # SRAM4.
@ -36,7 +36,7 @@ mcu = {
# alternative RAM_MAP needed for px4 bootloader compatibility
'ALT_RAM_MAP' : [
(0x24000000, 512, 4), # AXI SRAM. Use this for SDMMC IDMA ops
(0x24000000, 512, 4), # AXI SRAM.
(0x30000000, 256, 0), # SRAM1, SRAM2
(0x20000000, 128, 2), # DTCM, tightly coupled, no DMA, fast
(0x00000400, 63, 2), # ITCM (first 1k removed, to keep address 0 unused)