AP_HAL_ChibiOS: prepare H757I_EVAL for external flash programming

This commit is contained in:
Siddharth Purohit 2021-06-13 22:13:34 +05:30 committed by Andrew Tridgell
parent 32f91c4cb2
commit a039711628
2 changed files with 16 additions and 13 deletions

View File

@ -25,7 +25,7 @@ FLASH_SIZE_KB 2048
# setup build for a peripheral firmware
env AP_PERIPH 1
EXTERNAL_PROG_FLASH_MB 128
EXTERNAL_PROG_FLASH_MB 32
# bootloader is installed at zero offset
FLASH_RESERVE_START_KB 0

View File

@ -25,8 +25,11 @@ FLASH_SIZE_KB 2048
# setup build for a peripheral firmware
env AP_PERIPH 1
define HAL_BUILD_AP_PERIPH
define HAL_NO_GCS
# bootloader is installed at zero offset
FLASH_RESERVE_START_KB 0
FLASH_RESERVE_START_KB 128
define HAL_LED_ON 1
@ -41,16 +44,15 @@ PA13 JTMS-SWDIO SWD
PA14 JTCK-SWCLK SWD
# the first CAN bus
# PA11 CAN1_RX CAN1
# PA12 CAN1_TX CAN1
PA11 CAN1_RX CAN1
PA12 CAN1_TX CAN1
# PC8 GPIO CAN_SLEEP OUTPUT LOW
PA11 OTG_FS_DM OTG1
PA12 OTG_FS_DP OTG1
# PA11 OTG_FS_DM OTG1
# PA12 OTG_FS_DP OTG1
# order of UARTs (and USB)
SERIAL_ORDER OTG1 USART1
SERIAL_ORDER USART1
define HAL_USE_EMPTY_STORAGE 1
define HAL_STORAGE_SIZE 16384
@ -69,7 +71,11 @@ define HAL_NO_GPIO_IRQ
define NO_DATAFLASH TRUE
define DISABLE_SERIAL_ESC_COMM TRUE
PB13 VBUS INPUT OPENDRAIN
# QSPI Flash
# we only declare this so that initialisation
# doesn't reset these pins
PF8 QUADSPI_BK1_IO0 QUADSPI1
PF9 QUADSPI_BK1_IO1 QUADSPI1
PF7 QUADSPI_BK1_IO2 QUADSPI1
@ -77,12 +83,9 @@ PF6 QUADSPI_BK1_IO3 QUADSPI1
PG6 QUADSPI_BK1_NCS QUADSPI1
PB2 QUADSPI_CLK QUADSPI1
# IFace Device Name Bus QSPI Mode Clk Freq Size (Pow2) NCS Delay
QSPIDEV mt25q QUADSPI1 MODE1 50*MHZ 24 2
PB13 VBUS INPUT OPENDRAIN
# use DNA
define HAL_CAN_DEFAULT_NODE_ID 0
define CAN_APP_NODE_NAME "org.cubepilot.H757"
EXTERNAL_PROG_FLASH_MB 32