HAL_ChibiOS: added support for ALT_RAM_MAP on H7
for compatibility with the px4 H7 bootloader
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@ -34,6 +34,16 @@ mcu = {
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(0x38000000, 64, 1), # SRAM4.
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],
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# alternative RAM_MAP needed for px4 bootloader compatibility
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'ALT_RAM_MAP' : [
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(0x24000000, 512, 4), # AXI SRAM. Use this for SDMMC IDMA ops
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(0x30000000, 256, 0), # SRAM1, SRAM2
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(0x20000000, 128, 2), # DTCM, tightly coupled, no DMA, fast
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(0x00000400, 63, 2), # ITCM (first 1k removed, to keep address 0 unused)
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(0x30040000, 32, 0), # SRAM3.
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(0x38000000, 64, 1), # SRAM4.
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],
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# avoid a problem in the bootloader by making DTCM first. The DCache init
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# when using SRAM1 as primary memory gets a hard fault in bootloader
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# we can't use DTCM first for main firmware as some builds overflow the first segment
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@ -725,6 +725,9 @@ def get_ram_map():
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ram_map = get_mcu_config('RAM_MAP_EXTERNAL_FLASH', False)
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if ram_map is not None:
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return ram_map
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elif int(env_vars.get('USE_ALT_RAM_MAP',0)) == '1':
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print("Using ALT_RAM_MAP")
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return get_mcu_config('ALT_RAM_MAP', True)
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return get_mcu_config('RAM_MAP', True)
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def get_flash_pages_sizes():
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