HAL_ChibiOS: support SPI6 on Pixhawk4Pro

This commit is contained in:
Andrew Tridgell 2019-02-20 17:17:38 +11:00
parent 75cd20aea4
commit 8e745f74fb
3 changed files with 49 additions and 19 deletions

View File

@ -64,10 +64,10 @@ PF7 SPI5_SCK SPI5
PF8 SPI5_MISO SPI5
PF9 SPI5_MOSI SPI5
# SPI6 - external2 (disabled to save DMA channels)
# PG13 SPI6_SCK SPI6
# PG12 SPI6_MISO SPI6
# PB5 SPI6_MOSI SPI6
# SPI6 - external2
PG13 SPI6_SCK SPI6
PG12 SPI6_MISO SPI6
PB5 SPI6_MOSI SPI6
# sensor CS
PF10 MS5611_CS CS
@ -89,21 +89,26 @@ PI8 EXT2_CS3 CS
# I2C buses
# I2C1 is on GPS port
PB8 I2C1_SCL I2C1
PB9 I2C1_SDA I2C1
# I2C on telem4 connector
PF1 I2C2_SCL I2C2
PF0 I2C2_SDA I2C2
# I2C for onboard mag
PH7 I2C3_SCL I2C3
PH8 I2C3_SDA I2C3
# disable I2C4 till we support DMAMUX2
#PF14 I2C4_SCL I2C4
#PF15 I2C4_SDA I2C4
# I2C4 is on BDMA on DMAMUX2, connected to I2CA connector
PF14 I2C4_SCL I2C4
PF15 I2C4_SDA I2C4
# order of I2C buses
I2C_ORDER I2C3 I2C1 I2C2
I2C_ORDER I2C3 I2C1 I2C2 I2C4
define HAL_I2C_INTERNAL_MASK 1
# enable pins
PE3 VDD_3V3_SENSORS_EN OUTPUT LOW
@ -249,14 +254,28 @@ SPIDEV bmi055_a SPI1 DEVID4 BMI055_A_CS MODE3 10*MHZ 10*MHZ
SPIDEV ramtron SPI2 DEVID1 FRAM_CS MODE3 8*MHZ 8*MHZ
# SPI5 external connections
SPIDEV external10m0 SPI5 DEVID1 EXT1_CS1 MODE0 2*MHZ 2*MHZ
SPIDEV external10m1 SPI5 DEVID1 EXT1_CS1 MODE1 2*MHZ 2*MHZ
SPIDEV external10m2 SPI5 DEVID1 EXT1_CS1 MODE2 2*MHZ 2*MHZ
SPIDEV external10m3 SPI5 DEVID1 EXT1_CS1 MODE3 2*MHZ 2*MHZ
SPIDEV external20m0 SPI5 DEVID2 EXT1_CS2 MODE0 2*MHZ 2*MHZ
SPIDEV external20m1 SPI5 DEVID2 EXT1_CS2 MODE1 2*MHZ 2*MHZ
SPIDEV external20m2 SPI5 DEVID2 EXT1_CS2 MODE2 2*MHZ 2*MHZ
SPIDEV external20m3 SPI5 DEVID2 EXT1_CS2 MODE3 2*MHZ 2*MHZ
SPIDEV external1m0 SPI5 DEVID1 EXT1_CS1 MODE0 2*MHZ 2*MHZ
SPIDEV external1m1 SPI5 DEVID1 EXT1_CS1 MODE1 2*MHZ 2*MHZ
SPIDEV external1m2 SPI5 DEVID1 EXT1_CS1 MODE2 2*MHZ 2*MHZ
SPIDEV external1m3 SPI5 DEVID1 EXT1_CS1 MODE3 2*MHZ 2*MHZ
SPIDEV external2m0 SPI5 DEVID2 EXT1_CS2 MODE0 2*MHZ 2*MHZ
SPIDEV external2m1 SPI5 DEVID2 EXT1_CS2 MODE1 2*MHZ 2*MHZ
SPIDEV external2m2 SPI5 DEVID2 EXT1_CS2 MODE2 2*MHZ 2*MHZ
SPIDEV external2m3 SPI5 DEVID2 EXT1_CS2 MODE3 2*MHZ 2*MHZ
# SPI6 external connections
SPIDEV external3m0 SPI6 DEVID1 EXT2_CS1 MODE0 2*MHZ 2*MHZ
SPIDEV external3m1 SPI6 DEVID1 EXT2_CS1 MODE1 2*MHZ 2*MHZ
SPIDEV external3m2 SPI6 DEVID1 EXT2_CS1 MODE2 2*MHZ 2*MHZ
SPIDEV external3m3 SPI6 DEVID1 EXT2_CS1 MODE3 2*MHZ 2*MHZ
SPIDEV external4m0 SPI6 DEVID2 EXT2_CS2 MODE0 2*MHZ 2*MHZ
SPIDEV external4m1 SPI6 DEVID2 EXT2_CS2 MODE1 2*MHZ 2*MHZ
SPIDEV external4m2 SPI6 DEVID2 EXT2_CS2 MODE2 2*MHZ 2*MHZ
SPIDEV external4m3 SPI6 DEVID2 EXT2_CS2 MODE3 2*MHZ 2*MHZ
SPIDEV external5m0 SPI6 DEVID2 EXT2_CS3 MODE0 2*MHZ 2*MHZ
SPIDEV external5m1 SPI6 DEVID2 EXT2_CS3 MODE1 2*MHZ 2*MHZ
SPIDEV external5m2 SPI6 DEVID2 EXT2_CS3 MODE2 2*MHZ 2*MHZ
SPIDEV external5m3 SPI6 DEVID2 EXT2_CS3 MODE3 2*MHZ 2*MHZ
# microSD support (disabled for now)

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@ -728,8 +728,8 @@ def write_SPI_config(f):
n = int(dev[3:])
devlist.append('HAL_SPI%u_CONFIG' % n)
f.write(
'#define HAL_SPI%u_CONFIG { &SPID%u, %u, STM32_SPI_SPI%u_TX_DMA_STREAM, STM32_SPI_SPI%u_RX_DMA_STREAM }\n'
% (n, n, n, n, n))
'#define HAL_SPI%u_CONFIG { &SPID%u, %u, STM32_SPI_SPI%u_DMA_STREAMS }\n'
% (n, n, n, n))
f.write('#define HAL_SPI_BUS_LIST %s\n\n' % ','.join(devlist))
write_SPI_table(f)

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@ -330,7 +330,7 @@ def write_dma_header(f, peripheral_list, mcu_type, dma_exclude=[],
(chibios_dma_define_name(key)+'CHAN', chan))
break
# now generate UARTDriver.cpp DMA config lines
# now generate UARTDriver.cpp DMA config lines
f.write("\n\n// generated UART DMA configuration lines\n")
for u in range(1, 9):
key = None
@ -365,6 +365,17 @@ def write_dma_header(f, peripheral_list, mcu_type, dma_exclude=[],
else:
f.write("false, 0, 0\n")
# now generate SPI DMA streams lines
f.write("\n\n// generated SPI DMA configuration lines\n")
for u in range(1, 9):
if 'SPI%u_TX' % u in peripheral_list and 'SPI%u_RX' % u in peripheral_list:
key = 'SPI%u' % u
else:
continue
f.write('#define STM32_SPI_%s_DMA_STREAMS STM32_SPI_%s_TX_%s_STREAM, STM32_SPI_%s_RX_%s_STREAM\n' % (
key, key, dma_name(key), key, dma_name(key)))
if __name__ == '__main__':
import optparse