diff --git a/libraries/AP_HAL_ChibiOS/RCOutput.cpp b/libraries/AP_HAL_ChibiOS/RCOutput.cpp
index d4811727fa..d79a1f7c77 100644
--- a/libraries/AP_HAL_ChibiOS/RCOutput.cpp
+++ b/libraries/AP_HAL_ChibiOS/RCOutput.cpp
@@ -133,6 +133,11 @@ void RCOutput::set_freq_group(pwm_group &group)
             group.pwm_cfg.channels[j].mode = PWM_OUTPUT_ACTIVE_HIGH;
             force_reconfig = true;
         }
+        if (group.pwm_cfg.channels[j].mode == PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW) {
+            group.pwm_cfg.channels[j].mode = PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH;
+            force_reconfig = true;
+        }
+
     }
 
     if (old_clock != group.pwm_cfg.frequency ||
@@ -516,8 +521,13 @@ bool RCOutput::setup_group_DMA(pwm_group &group, uint32_t bitrate, uint32_t bit_
     group.bit_width_mul = (freq + (target_frequency/2)) / target_frequency;
 
     for (uint8_t j=0; j<4; j++) {
-        if (group.pwm_cfg.channels[j].mode != PWM_OUTPUT_DISABLED) {
-            group.pwm_cfg.channels[j].mode = active_high?PWM_OUTPUT_ACTIVE_HIGH:PWM_OUTPUT_ACTIVE_LOW;
+        pwmmode_t mode = group.pwm_cfg.channels[j].mode;
+        if (mode != PWM_OUTPUT_DISABLED) {
+            if(mode == PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW || mode == PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH) {
+               group.pwm_cfg.channels[j].mode = active_high?PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW;
+            } else {
+               group.pwm_cfg.channels[j].mode = active_high?PWM_OUTPUT_ACTIVE_HIGH:PWM_OUTPUT_ACTIVE_LOW;
+            }
         }
     }
     
diff --git a/libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h b/libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h
index 6f9e6e7e8d..321e01458f 100644
--- a/libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h
+++ b/libraries/AP_HAL_ChibiOS/hwdef/common/mcuconf.h
@@ -283,7 +283,9 @@
 /*
  * PWM driver system settings.
  */
+#ifndef STM32_PWM_USE_ADVANCED
 #define STM32_PWM_USE_ADVANCED              FALSE
+#endif
 #define STM32_PWM_TIM1_IRQ_PRIORITY         7
 #define STM32_PWM_TIM2_IRQ_PRIORITY         7
 #define STM32_PWM_TIM3_IRQ_PRIORITY         7
diff --git a/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py b/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py
index 35206539e1..9898945c90 100755
--- a/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py
+++ b/libraries/AP_HAL_ChibiOS/hwdef/scripts/chibios_hwdef.py
@@ -689,6 +689,7 @@ def write_PWM_config(f):
             if p.type != t:
                 continue
             chan_str = p.label[7]
+            is_complementary = p.label[-1] == 'N';
             if not is_int(chan_str):
                 error("Bad channel for PWM %s" % p)
             chan = int(chan_str)
@@ -696,7 +697,10 @@ def write_PWM_config(f):
                 error("Bad channel number %u for PWM %s" % (chan, p))
             pwm = p.extra_value('PWM', type=int)
             chan_list[chan - 1] = pwm - 1
-            chan_mode[chan - 1] = 'PWM_OUTPUT_ACTIVE_HIGH'
+            if is_complementary:
+                chan_mode[chan - 1] = 'PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH'
+            else:
+                chan_mode[chan - 1] = 'PWM_OUTPUT_ACTIVE_HIGH'
             alt_functions[chan - 1] = p.af
             pal_lines[chan - 1] = 'PAL_LINE(GPIO%s, %uU)' % (p.port, p.pin)
         groups.append('HAL_PWM_GROUP%u' % group)