ChibiOS: add support for complementry output timer channels
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1b7eecdf2f
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79b5719419
@ -133,6 +133,11 @@ void RCOutput::set_freq_group(pwm_group &group)
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group.pwm_cfg.channels[j].mode = PWM_OUTPUT_ACTIVE_HIGH;
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force_reconfig = true;
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}
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if (group.pwm_cfg.channels[j].mode == PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW) {
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group.pwm_cfg.channels[j].mode = PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH;
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force_reconfig = true;
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}
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}
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if (old_clock != group.pwm_cfg.frequency ||
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@ -516,8 +521,13 @@ bool RCOutput::setup_group_DMA(pwm_group &group, uint32_t bitrate, uint32_t bit_
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group.bit_width_mul = (freq + (target_frequency/2)) / target_frequency;
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for (uint8_t j=0; j<4; j++) {
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if (group.pwm_cfg.channels[j].mode != PWM_OUTPUT_DISABLED) {
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group.pwm_cfg.channels[j].mode = active_high?PWM_OUTPUT_ACTIVE_HIGH:PWM_OUTPUT_ACTIVE_LOW;
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pwmmode_t mode = group.pwm_cfg.channels[j].mode;
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if (mode != PWM_OUTPUT_DISABLED) {
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if(mode == PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW || mode == PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH) {
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group.pwm_cfg.channels[j].mode = active_high?PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH:PWM_COMPLEMENTARY_OUTPUT_ACTIVE_LOW;
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} else {
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group.pwm_cfg.channels[j].mode = active_high?PWM_OUTPUT_ACTIVE_HIGH:PWM_OUTPUT_ACTIVE_LOW;
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}
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}
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}
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@ -283,7 +283,9 @@
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/*
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* PWM driver system settings.
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*/
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#ifndef STM32_PWM_USE_ADVANCED
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#define STM32_PWM_USE_ADVANCED FALSE
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#endif
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#define STM32_PWM_TIM1_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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@ -689,6 +689,7 @@ def write_PWM_config(f):
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if p.type != t:
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continue
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chan_str = p.label[7]
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is_complementary = p.label[-1] == 'N';
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if not is_int(chan_str):
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error("Bad channel for PWM %s" % p)
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chan = int(chan_str)
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@ -696,7 +697,10 @@ def write_PWM_config(f):
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error("Bad channel number %u for PWM %s" % (chan, p))
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pwm = p.extra_value('PWM', type=int)
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chan_list[chan - 1] = pwm - 1
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chan_mode[chan - 1] = 'PWM_OUTPUT_ACTIVE_HIGH'
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if is_complementary:
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chan_mode[chan - 1] = 'PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH'
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else:
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chan_mode[chan - 1] = 'PWM_OUTPUT_ACTIVE_HIGH'
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alt_functions[chan - 1] = p.af
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pal_lines[chan - 1] = 'PAL_LINE(GPIO%s, %uU)' % (p.port, p.pin)
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groups.append('HAL_PWM_GROUP%u' % group)
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