HAL_ChibiOS: hold write lock for unbuffered writes
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ad26ca4a27
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3dacbd1b36
@ -210,9 +210,11 @@ void UARTDriver::dma_tx_deallocate(void)
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void UARTDriver::tx_complete(void* self, uint32_t flags)
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{
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UARTDriver* uart_drv = (UARTDriver*)self;
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if (!uart_drv->tx_bounce_buf_ready) {
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uart_drv->dma_handle->unlock_from_IRQ();
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uart_drv->_last_write_completed_us = AP_HAL::micros();
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uart_drv->tx_bounce_buf_ready = true;
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}
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}
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@ -401,6 +403,9 @@ size_t UARTDriver::write(const uint8_t *buffer, size_t size)
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size_t ret = _writebuf.write(buffer, size);
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if (unbuffered_writes) {
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if (ret != size) {
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hal.console->printf("ret=%d size=%d\n", (int)ret, (int)size);
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}
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write_pending_bytes();
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}
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chMtxUnlock(&_write_mutex);
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@ -431,6 +436,9 @@ void UARTDriver::write_pending_bytes_DMA(uint32_t n)
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if (!tx_bounce_buf_ready && txdma) {
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if (!(txdma->stream->CR & STM32_DMA_CR_EN)) {
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if (txdma->stream->NDTR == 0) {
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hal.console->printf("ISR complete %u took %u\n",
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AP_HAL::millis(),
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AP_HAL::micros() - _last_write_started_us);
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tx_bounce_buf_ready = true;
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_last_write_completed_us = AP_HAL::micros();
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dma_handle->unlock();
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@ -459,6 +467,7 @@ void UARTDriver::write_pending_bytes_DMA(uint32_t n)
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dmamode |= STM32_DMA_CR_PL(0);
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dmaStreamSetMode(txdma, dmamode | STM32_DMA_CR_DIR_M2P |
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
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_last_write_started_us = AP_HAL::micros();
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dmaStreamEnable(txdma);
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}
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@ -608,10 +617,16 @@ void UARTDriver::_timer_tick(void)
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}
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}
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if (!unbuffered_writes) {
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if (unbuffered_writes) {
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// now send pending bytes. If we are doing "unbuffered" writes
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// then the send happens as soon as the bytes are provided by
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// the write() call, and no writes are done in the timer tick
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// then the send normally happens as soon as the bytes are
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// provided by the write() call, but if the write is larger
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// than the DMA buffer size then there can be extra bytes to
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// send here, and they must be sent with the write lock held
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chMtxLock(&_write_mutex);
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write_pending_bytes();
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chMtxUnlock(&_write_mutex);
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} else {
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write_pending_bytes();
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}
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