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HAL_ChibiOS: align buffers to STM32F7 cache lines

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this allows for DMA flush and invalidate operations to work on all
dynamically allocated memory
This commit is contained in:
Andrew Tridgell 2018-05-30 18:58:51 +10:00
parent 762e4f9915
commit 2087354939
1 changed files with 6 additions and 0 deletions
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6
libraries/AP_HAL_ChibiOS/hwdef/common/malloc.c
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@ -30,7 +30,13 @@
#include <chheap.h> #include <chheap.h>
#include <stdarg.h> #include <stdarg.h>
#if defined(STM32F7) && STM32_DMA_CACHE_HANDLING == TRUE
// to allow for dma management functions we need buffers to be
// aligned to the cache line size
#define MIN_ALIGNMENT 32
#else
#define MIN_ALIGNMENT 8 #define MIN_ALIGNMENT 8
#endif
#if defined(CCM_RAM_SIZE) #if defined(CCM_RAM_SIZE)
#ifndef CCM_BASE_ADDRESS #ifndef CCM_BASE_ADDRESS