mirror of https://github.com/ArduPilot/ardupilot
119 lines
3.4 KiB
C++
119 lines
3.4 KiB
C++
#include "SIM_RAMTRON.h"
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#if AP_SIM_RAMTRON_ENABLED
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#include <errno.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <AP_HAL_SITL/AP_HAL_SITL.h>
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using namespace SITL;
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extern const HAL_SITL& hal_sitl;
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void RAMTRON::open_storage_fd()
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{
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if (storage_fd != -1) {
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AP_HAL::panic("Should not have been called");
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}
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const char *filepath = filename();
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uint32_t flags = O_RDWR|O_CREAT;
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if (hal_sitl.get_wipe_storage()) {
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flags |= O_TRUNC;
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}
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storage_fd = open(filepath, flags, 0644);
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if (storage_fd == -1) {
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AP_HAL::panic("open(%s): %s", filepath, strerror(errno));
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}
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if (ftruncate(storage_fd, storage_size()) != 0) {
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AP_HAL::panic("truncate(%s): %s", filepath, strerror(errno));
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}
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}
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int RAMTRON::rdwr(uint8_t count, SPI::spi_ioc_transfer *&tfrs)
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{
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if (storage_fd == -1) {
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open_storage_fd();
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}
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// commands:
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static const uint8_t RAMTRON_RDID = 0x9f;
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static const uint8_t RAMTRON_READ = 0x03;
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static const uint8_t RAMTRON_WREN = 0x06;
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static const uint8_t RAMTRON_WRITE = 0x02;
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for (uint8_t i=0; i<count; i++) {
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SPI::spi_ioc_transfer &tfr = tfrs[i];
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uint8_t *tx_buf = (uint8_t*)(tfr.tx_buf);
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uint8_t *rx_buf = (uint8_t*)(tfr.rx_buf);
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switch (state) {
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case State::WAITING: {
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// find a command
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uint8_t command = tx_buf[0];
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switch (command) {
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case RAMTRON_RDID:
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state = State::READING_RDID;
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break;
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case RAMTRON_READ:
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xfr_addr = tx_buf[1] << 8 | tx_buf[2];
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state = State::READING;
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break;
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case RAMTRON_WRITE:
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xfr_addr = tx_buf[1] << 8 | tx_buf[2];
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state = State::WRITING;
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break;
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case RAMTRON_WREN:
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write_enabled = true;
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break;
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default:
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abort();
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}
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break;
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}
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case State::READING_RDID:
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fill_rdid(rx_buf, tfr.len);
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state = State::WAITING;
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break;
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case State::READING: {
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if (xfr_addr + tfr.len > storage_size()) {
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abort();
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}
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if (lseek(storage_fd, xfr_addr, SEEK_SET) == -1) {
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AP_HAL::panic("lseek(): %s", strerror(errno));
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}
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const size_t read_ret = read(storage_fd, rx_buf, tfr.len);
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if (read_ret != tfr.len) {
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AP_HAL::panic("read(): %s (%d/%u)", strerror(errno), (signed)read_ret, (unsigned)tfr.len);
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}
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state = State::WAITING;
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break;
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}
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case State::WRITING: {
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if (!write_enabled) {
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AP_HAL::panic("Writes not enabled");
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}
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if (xfr_addr + tfr.len > storage_size()) {
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abort();
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}
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if (lseek(storage_fd, xfr_addr, SEEK_SET) == -1) {
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AP_HAL::panic("lseek(): %s", strerror(errno));
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}
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const size_t write_ret = write(storage_fd, tx_buf, tfr.len);
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if (write_ret != tfr.len) {
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AP_HAL::panic("write(): %s (%d/%u)", strerror(errno), (signed)write_ret, (unsigned)tfr.len);
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}
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state = State::WAITING;
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write_enabled = false;
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break;
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}
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}
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}
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return 0;
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}
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#endif // AP_SIM_RAMTRON_ENABLED
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