mirror of https://github.com/ArduPilot/ardupilot
199 lines
6.8 KiB
C
199 lines
6.8 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#pragma once
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/*
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* STM32F303 drivers configuration.
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* The following settings override the default settings present in
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* the various device driver implementation headers.
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* Note that the settings for each driver only have effect if the whole
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* driver is enabled in halconf.h.
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*
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* IRQ priorities:
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* 15...0 Lowest...Highest.
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*
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* DMA priorities:
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* 0...3 Lowest...Highest.
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*/
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#define STM32F3xx_MCUCONF
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/*
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* HAL driver system settings.
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*/
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#define STM32_NO_INIT FALSE
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#define STM32_LSE_ENABLED FALSE
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#if STM32_HSECLK == 0U
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// use HSI, disable HSE
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#define STM32_HSI_ENABLED TRUE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_HSE_ENABLED FALSE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSI
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 16
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#define STM32_PPRE1 STM32_PPRE1_DIV2
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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#define STM32_HPRE STM32_HPRE_DIV1
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#define STM32_RTCSEL STM32_RTCSEL_LSI
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// can't do more than 64MHz with HSI
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#undef HAL_EXPECTED_SYSCLOCK
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#define HAL_EXPECTED_SYSCLOCK 64000000
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#elif STM32_HSECLK == 8000000U
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#define STM32_HSI_ENABLED FALSE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_PPRE1 STM32_PPRE1_DIV2
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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#define STM32_HPRE STM32_HPRE_DIV1
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#elif STM32_HSECLK == 24000000U
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#define STM32_HSI_ENABLED FALSE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_SW STM32_SW_PLL
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 3
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#define STM32_PPRE1 STM32_PPRE1_DIV2
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#define STM32_PPRE2 STM32_PPRE2_DIV2
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#define STM32_ADCPRE STM32_ADCPRE_DIV4
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#define STM32_HPRE STM32_HPRE_DIV1
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#else
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#error "Unsupported STM32F1xx clock frequency"
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#endif
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#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
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#ifndef STM32_RTCSEL
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#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
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#endif
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#define STM32_PVD_ENABLE FALSE
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#define STM32_PLS STM32_PLS_LEV0
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/*
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* ADC driver system settings.
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*/
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 6
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/*
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* EXT driver system settings.
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*/
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#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
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#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_TIM1_IRQ_PRIORITY 7
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#define STM32_GPT_TIM2_IRQ_PRIORITY 7
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#define STM32_GPT_TIM3_IRQ_PRIORITY 7
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#define STM32_GPT_TIM4_IRQ_PRIORITY 7
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#define STM32_GPT_TIM5_IRQ_PRIORITY 7
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#define STM32_GPT_TIM8_IRQ_PRIORITY 7
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/*
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* I2C driver system settings.
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*/
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#define STM32_I2C_BUSY_TIMEOUT 50
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#define STM32_I2C_I2C1_IRQ_PRIORITY 5
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#define STM32_I2C_I2C2_IRQ_PRIORITY 5
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#define STM32_I2C_I2C1_DMA_PRIORITY 3
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#define STM32_I2C_I2C2_DMA_PRIORITY 3
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#define STM32_I2C_DMA_ERROR_HOOK(i2cp) STM32_DMA_ERROR_HOOK(i2cp)
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/*
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* ICU driver system settings.
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*/
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#define STM32_ICU_TIM1_IRQ_PRIORITY 7
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#define STM32_ICU_TIM2_IRQ_PRIORITY 7
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#define STM32_ICU_TIM3_IRQ_PRIORITY 7
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#define STM32_ICU_TIM4_IRQ_PRIORITY 7
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#define STM32_ICU_TIM5_IRQ_PRIORITY 7
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#define STM32_ICU_TIM8_IRQ_PRIORITY 7
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/*
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* PWM driver system settings.
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*/
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#define STM32_PWM_TIM1_IRQ_PRIORITY 7
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#define STM32_PWM_TIM2_IRQ_PRIORITY 7
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#define STM32_PWM_TIM3_IRQ_PRIORITY 7
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#define STM32_PWM_TIM4_IRQ_PRIORITY 7
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#define STM32_PWM_TIM5_IRQ_PRIORITY 7
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#define STM32_PWM_TIM8_IRQ_PRIORITY 7
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/*
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* RTC driver system settings.
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*/
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#define STM32_RTC_IRQ_PRIORITY 15
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/*
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* SERIAL driver system settings.
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*/
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#define STM32_SERIAL_USART1_PRIORITY 12
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#define STM32_SERIAL_USART2_PRIORITY 12
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#define STM32_SERIAL_USART3_PRIORITY 12
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/*
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* SPI driver system settings.
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*/
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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#define STM32_SPI_SPI2_DMA_PRIORITY 1
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#define STM32_SPI_SPI1_IRQ_PRIORITY 10
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#define STM32_SPI_SPI2_IRQ_PRIORITY 10
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#define STM32_SPI_DMA_ERROR_HOOK(spip) STM32_DMA_ERROR_HOOK(spip)
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/*
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* ST driver system settings.
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*/
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#define STM32_ST_IRQ_PRIORITY 8
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#ifndef STM32_ST_USE_TIMER
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#define STM32_ST_USE_TIMER 2
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#endif
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/*
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* UART driver system settings.
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*/
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#define STM32_UART_USART1_IRQ_PRIORITY 12
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#define STM32_UART_USART2_IRQ_PRIORITY 12
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#define STM32_UART_USART3_IRQ_PRIORITY 12
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#define STM32_UART_USART1_DMA_PRIORITY 0
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#define STM32_UART_USART2_DMA_PRIORITY 0
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#define STM32_UART_USART3_DMA_PRIORITY 0
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#define STM32_UART_DMA_ERROR_HOOK(uartp) STM32_DMA_ERROR_HOOK(uartp)
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/*
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* WDG driver system settings.
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*/
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#define STM32_WDG_USE_IWDG FALSE
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#ifndef STM32_ADC_USE_ADC1
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#define STM32_ADC_USE_ADC1 FALSE
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#endif
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