mirror of https://github.com/ArduPilot/ardupilot
317 lines
8.8 KiB
C++
317 lines
8.8 KiB
C++
/*
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* Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
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*
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* With modifications for Ardupilot CAN driver
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* Copyright (C) 2017 Eugene Shamaev
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*/
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#pragma once
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#include "AP_HAL_PX4.h"
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#include <systemlib/perf_counter.h>
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#include <AP_HAL/CAN.h>
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#include <pthread.h>
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#include <semaphore.h>
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#include "bxcan.h"
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#include "AP_HAL/utility/RingBuffer.h"
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#if defined(GPIO_CAN2_RX) && defined(GPIO_CAN2_TX)
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#define CAN_STM32_NUM_IFACES 2
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#else
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#define CAN_STM32_NUM_IFACES 1
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#endif
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#define CAN_STM32_RX_QUEUE_SIZE 64
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namespace PX4 {
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/**
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* Driver error codes.
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* These values can be returned from driver functions negated.
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*/
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static const int16_t ErrUnknown = 1000; ///< Reserved for future use
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static const int16_t ErrNotImplemented = 1001; ///< Feature not implemented
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static const int16_t ErrInvalidBitRate = 1002; ///< Bit rate not supported
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static const int16_t ErrLogic = 1003; ///< Internal logic error
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static const int16_t ErrUnsupportedFrame = 1004; ///< Frame not supported (e.g. RTR, CAN FD, etc)
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static const int16_t ErrMsrInakNotSet = 1005; ///< INAK bit of the MSR register is not 1
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static const int16_t ErrMsrInakNotCleared = 1006; ///< INAK bit of the MSR register is not 0
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static const int16_t ErrBitRateNotDetected = 1007; ///< Auto bit rate detection could not be finished
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/**
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* RX queue item.
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* The application shall not use this directly.
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*/
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struct CanRxItem {
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uint64_t utc_usec;
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uavcan::CanFrame frame;
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uavcan::CanIOFlags flags;
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CanRxItem() :
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utc_usec(0), flags(0)
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{
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}
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};
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struct CriticalSectionLocker {
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const irqstate_t flags_;
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CriticalSectionLocker() :
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flags_(irqsave())
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{
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}
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~CriticalSectionLocker()
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{
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irqrestore(flags_);
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}
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};
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namespace clock {
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uint64_t getUtcUSecFromCanInterrupt();
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uavcan::MonotonicTime getMonotonic();
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}
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class BusEvent: uavcan::Noncopyable {
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public:
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BusEvent(PX4CANManager& can_driver);
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~BusEvent();
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bool wait(uavcan::MonotonicDuration duration);
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static void signalFromCallOut(BusEvent *sem);
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void signalFromInterrupt();
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sem_t _wait_semaphore;
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volatile uint16_t _signal;
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};
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class PX4CAN: public AP_HAL::CAN {
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struct Timings {
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uint16_t prescaler;
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uint8_t sjw;
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uint8_t bs1;
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uint8_t bs2;
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Timings() :
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prescaler(0), sjw(0), bs1(0), bs2(0)
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{
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}
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};
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struct TxItem {
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uavcan::MonotonicTime deadline;
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uavcan::CanFrame frame;
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bool pending;
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bool loopback;
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bool abort_on_error;
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TxItem() :
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pending(false), loopback(false), abort_on_error(false)
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{
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}
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};
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enum {
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NumTxMailboxes = 3
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};
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enum {
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NumFilters = 28
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};
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static const uint32_t TSR_ABRQx[NumTxMailboxes];
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ObjectBuffer<CanRxItem> rx_queue_;
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bxcan::CanType* const can_;
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uint64_t error_cnt_;
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uint32_t served_aborts_cnt_;
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BusEvent& update_event_;
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TxItem pending_tx_[NumTxMailboxes];
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uint8_t peak_tx_mailbox_index_;
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const uint8_t self_index_;
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bool had_activity_;
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uint32_t bitrate_;
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int computeTimings(uint32_t target_bitrate, Timings& out_timings);
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virtual int16_t send(const uavcan::CanFrame& frame, uavcan::MonotonicTime tx_deadline,
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uavcan::CanIOFlags flags) override;
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virtual int16_t receive(uavcan::CanFrame& out_frame, uavcan::MonotonicTime& out_ts_monotonic,
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uavcan::UtcTime& out_ts_utc, uavcan::CanIOFlags& out_flags) override;
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virtual int16_t configureFilters(const uavcan::CanFilterConfig* filter_configs, uint16_t num_configs) override;
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virtual uint16_t getNumFilters() const override
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{
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return NumFilters;
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}
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void handleTxMailboxInterrupt(uint8_t mailbox_index, bool txok, uint64_t utc_usec);
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bool waitMsrINakBitStateChange(bool target_state);
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bool initialized_;
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public:
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enum {
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MaxRxQueueCapacity = 254
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};
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enum OperatingMode {
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NormalMode, SilentMode
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};
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PX4CAN(bxcan::CanType* can, BusEvent& update_event, uint8_t self_index, uint8_t rx_queue_capacity) :
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rx_queue_(rx_queue_capacity), can_(can), error_cnt_(0), served_aborts_cnt_(0), update_event_(
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update_event), peak_tx_mailbox_index_(0), self_index_(self_index), had_activity_(false), bitrate_(
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0), initialized_(false)
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{
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UAVCAN_ASSERT(self_index_ < CAN_STM32_NUM_IFACES);
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}
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/**
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* Initializes the hardware CAN controller.
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* Assumes:
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* - Iface clock is enabled
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* - Iface has been resetted via RCC
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* - Caller will configure NVIC by itself
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*/
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int init(const uint32_t bitrate, const OperatingMode mode);
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void handleTxInterrupt(uint64_t utc_usec);
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void handleRxInterrupt(uint8_t fifo_index, uint64_t utc_usec);
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/**
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* This method is used to count errors and abort transmission on error if necessary.
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* This functionality used to be implemented in the SCE interrupt handler, but that approach was
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* generating too much processing overhead, especially on disconnected interfaces.
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*
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* Should be called from RX ISR, TX ISR, and select(); interrupts must be enabled.
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*/
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void pollErrorFlagsFromISR();
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void discardTimedOutTxMailboxes(uavcan::MonotonicTime current_time);
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bool canAcceptNewTxFrame(const uavcan::CanFrame& frame) const;
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bool isRxBufferEmpty() const;
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/**
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* Total number of hardware failures and other kinds of errors (e.g. queue overruns).
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* May increase continuously if the interface is not connected to the bus.
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*/
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virtual uint64_t getErrorCount() const override;
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/**
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* Number of times the driver exercised library's requirement to abort transmission on first error.
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* This is an atomic read, it doesn't require a critical section.
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* See @ref uavcan::CanIOFlagAbortOnError.
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*/
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uint32_t getVoluntaryTxAbortCount() const
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{
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return served_aborts_cnt_;
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}
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/**
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* Returns the number of frames pending in the RX queue.
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* This is intended for debug use only.
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*/
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unsigned getRxQueueLength() const;
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/**
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* Whether this iface had at least one successful IO since the previous call of this method.
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* This is designed for use with iface activity LEDs.
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*/
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bool hadActivity();
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/**
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* Peak number of TX mailboxes used concurrently since initialization.
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* Range is [1, 3].
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* Value of 3 suggests that priority inversion could be taking place.
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*/
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uint8_t getPeakNumTxMailboxesUsed() const
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{
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return uint8_t(peak_tx_mailbox_index_ + 1);
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}
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bool begin(uint32_t bitrate) override;
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void end() override
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{
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}
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void reset() override;
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int32_t tx_pending() override;
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int32_t available() override;
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bool is_initialized() override;
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};
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class PX4CANManager: public AP_HAL::CANManager {
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BusEvent update_event_;
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PX4CAN if0_;
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PX4CAN if1_;
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uint8_t can_number_;
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virtual int16_t select(uavcan::CanSelectMasks& inout_masks,
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const uavcan::CanFrame* (&pending_tx)[uavcan::MaxCanIfaces], uavcan::MonotonicTime blocking_deadline) override;
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static void initOnce(uint8_t can_number);
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bool initialized_;
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static PX4CAN* ifaces[CAN_STM32_NUM_IFACES];
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public:
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PX4CANManager() :
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update_event_(*this), if0_(bxcan::Can[0], update_event_, 0, CAN_STM32_RX_QUEUE_SIZE), if1_(
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bxcan::Can[1], update_event_, 1, CAN_STM32_RX_QUEUE_SIZE), can_number_(0), initialized_(
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false), p_uavcan(nullptr)
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{
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uavcan::StaticAssert<(CAN_STM32_RX_QUEUE_SIZE <= PX4CAN::MaxRxQueueCapacity)>::check();
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}
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/**
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* This function returns select masks indicating which interfaces are available for read/write.
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*/
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uavcan::CanSelectMasks makeSelectMasks(const uavcan::CanFrame* (&pending_tx)[uavcan::MaxCanIfaces]) const;
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/**
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* Whether there's at least one interface where receive() would return a frame.
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*/
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bool hasReadableInterfaces() const;
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/**
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* Returns zero if OK.
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* Returns negative value if failed (e.g. invalid bitrate).
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*/
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int init(const uint32_t bitrate, const PX4CAN::OperatingMode mode, uint8_t can_number);
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virtual PX4CAN* getIface(uint8_t iface_index) override;
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virtual uint8_t getNumIfaces() const override
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{
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if (can_number_ >= 2) {
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return CAN_STM32_NUM_IFACES;
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}
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return 1;
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}
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/**
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* Whether at least one iface had at least one successful IO since previous call of this method.
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* This is designed for use with iface activity LEDs.
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*/
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bool hadActivity();
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bool begin(uint32_t bitrate, uint8_t can_number) override;
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bool is_initialized() override;
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AP_UAVCAN *p_uavcan;
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AP_UAVCAN *get_UAVCAN(void) override;
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void set_UAVCAN(AP_UAVCAN *uavcan) override;
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};
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}
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