mirror of https://github.com/ArduPilot/ardupilot
419 lines
13 KiB
OpenEdge ABL
419 lines
13 KiB
OpenEdge ABL
// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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// RC AllInOnePRU
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//
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// 1 channel RCInput with 5ns accuracy
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// 12 channel RCOutput with 1us accuracy
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// Timer
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#define TICK_PER_US 200
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#define TICK_PER_MS 200000
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// PWM
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// 0 us
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#define PWM_PULSE_DEFAULT (0 * TICK_PER_US)
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// 50 Hz
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#define PWM_FREQ_DEFAULT (20 * TICK_PER_MS)
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// Ringbuffer size
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#define RCIN_RINGBUFFERSIZE 300
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// PRU Constants Table
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#define ECAP C3
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#define RAM C24
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#define IEP C26
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// IEP
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#define IEP_TMR_GLB_CFG 0x0
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#define IEP_TMR_GLB_STS 0x4
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#define IEP_TMR_CNT 0xc
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#define IEP_CNT_ENABLE 0x0
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#define IEP_DEFAULT_INC 0x4
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// ECAP
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#define ECAP_TSCTR 0x0
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#define ECAP_CTRPHS 0x4
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#define ECAP_CAP1 0x8
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#define ECAP_CAP2 0xc
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#define ECAP_CAP3 0x10
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#define ECAP_CAP4 0x14
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#define ECAP_ECCTL1 0x28
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#define ECAP_ECCTL2 0x2a
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#define ECAP_ECEINT 0x2c
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#define ECAP_ECFLG 0x2e
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#define ECAP_ECCLR 0x30
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#define ECAP_ECFRC 0x32
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#define ECAP_REVID 0x5c
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// ECCTL1
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#define ECAP_CAP1POL 0
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#define ECAP_CTRRST1 1
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#define ECAP_CAP2POL 2
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#define ECAP_CTRRST2 3
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#define ECAP_CAP3POL 4
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#define ECAP_CTRRST3 5
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#define ECAP_CAP4POL 6
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#define ECAP_CTRRST4 7
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#define ECAP_CAPLDEN 8
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#define ECAP_PRESCALE 9
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#define ECAP_FREE_SOFT 14
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// ECCTL2
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#define ECAP_CONT_ONESHT 0
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#define ECAP_STOP_WRAP 1
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#define ECAP_RE_ARM 3
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#define ECAP_TSCTRSTOP 4
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#define ECAP_SYNCI_EN 5
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#define ECAP_SYNCO_SEL 6
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#define ECAP_SWSYNC 8
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#define ECAP_CAP_APWM 9
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#define ECAP_APWMPOL 10
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// ECEINT, ECFLG
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#define ECAP_INT 0
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#define ECAP_CEVT1 1
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#define ECAP_CEVT2 2
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#define ECAP_CEVT3 3
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#define ECAP_CEVT4 4
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#define ECAP_CNTOVF 5
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#define ECAP_PRDEQ 6
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#define ECAP_CMPEQ 7
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// RAM
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#define CH_ENABLE_RAM_OFFSET (0 * 4)
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#define CH_1_PULSE_TIME_RAM_OFFSET (1 * 4)
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#define CH_1_T_TIME_RAM_OFFSET (2 * 4)
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#define CH_2_PULSE_TIME_RAM_OFFSET (3 * 4)
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#define CH_2_T_TIME_RAM_OFFSET (4 * 4)
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#define CH_3_PULSE_TIME_RAM_OFFSET (5 * 4)
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#define CH_3_T_TIME_RAM_OFFSET (6 * 4)
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#define CH_4_PULSE_TIME_RAM_OFFSET (7 * 4)
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#define CH_4_T_TIME_RAM_OFFSET (8 * 4)
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#define CH_5_PULSE_TIME_RAM_OFFSET (9 * 4)
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#define CH_5_T_TIME_RAM_OFFSET (10 * 4)
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#define CH_6_PULSE_TIME_RAM_OFFSET (11 * 4)
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#define CH_6_T_TIME_RAM_OFFSET (12 * 4)
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#define CH_7_PULSE_TIME_RAM_OFFSET (13 * 4)
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#define CH_7_T_TIME_RAM_OFFSET (14 * 4)
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#define CH_8_PULSE_TIME_RAM_OFFSET (15 * 4)
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#define CH_8_T_TIME_RAM_OFFSET (16 * 4)
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#define CH_9_PULSE_TIME_RAM_OFFSET (17 * 4)
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#define CH_9_T_TIME_RAM_OFFSET (18 * 4)
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#define CH_10_PULSE_TIME_RAM_OFFSET (19 * 4)
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#define CH_10_T_TIME_RAM_OFFSET (20 * 4)
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#define CH_11_PULSE_TIME_RAM_OFFSET (21 * 4)
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#define CH_11_T_TIME_RAM_OFFSET (22 * 4)
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#define CH_12_PULSE_TIME_RAM_OFFSET (23 * 4)
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#define CH_12_T_TIME_RAM_OFFSET (24 * 4)
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#define MAX_CYCLE_TIME_OFFSET (25 * 4)
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#define RCIN_RING_HEAD_OFFSET 0x1000
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#define RCIN_RING_TAIL_OFFSET 0x1002
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#define RCIN_RINGBUFFER_RAM_OFFSET 0x1004
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// RCOut pins
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#ifdef BBBMINI
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#define RC_CH_1_PIN r30.t10
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#define RC_CH_2_PIN r30.t8
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#define RC_CH_3_PIN r30.t11
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#define RC_CH_4_PIN r30.t9
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#define RC_CH_5_PIN r30.t7
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#define RC_CH_6_PIN r30.t6
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#define RC_CH_7_PIN r30.t5
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#define RC_CH_8_PIN r30.t4
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#define RC_CH_9_PIN r30.t3
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#define RC_CH_10_PIN r30.t2
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#define RC_CH_11_PIN r30.t1
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#define RC_CH_12_PIN r30.t0
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#endif
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#ifdef BBBLUE
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#define RC_CH_1_PIN r30.t8
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#define RC_CH_2_PIN r30.t10
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#define RC_CH_3_PIN r30.t9
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#define RC_CH_4_PIN r30.t11
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#define RC_CH_5_PIN r30.t6
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#define RC_CH_6_PIN r30.t7
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#define RC_CH_7_PIN r30.t4
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#define RC_CH_8_PIN r30.t5
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#endif
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#ifdef POCKET
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#define RC_CH_1_PIN r30.t7
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#define RC_CH_2_PIN r30.t4
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#define RC_CH_3_PIN r30.t1
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#define RC_CH_4_PIN r30.t5
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#define RC_CH_5_PIN r30.t2
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#define RC_CH_6_PIN r30.t6
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#endif
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// RCOut enable bits
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#define RC_CH_1_ENABLE register.ch_enable.t0
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#define RC_CH_2_ENABLE register.ch_enable.t1
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#define RC_CH_3_ENABLE register.ch_enable.t2
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#define RC_CH_4_ENABLE register.ch_enable.t3
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#define RC_CH_5_ENABLE register.ch_enable.t4
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#define RC_CH_6_ENABLE register.ch_enable.t5
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#define RC_CH_7_ENABLE register.ch_enable.t6
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#define RC_CH_8_ENABLE register.ch_enable.t7
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#define RC_CH_9_ENABLE register.ch_enable.t8
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#define RC_CH_10_ENABLE register.ch_enable.t9
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#define RC_CH_11_ENABLE register.ch_enable.t10
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#define RC_CH_12_ENABLE register.ch_enable.t11
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// Register struct
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.struct RegisterStruct
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.u32 ch_enable
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.u32 ch_1_next_time
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.u32 ch_2_next_time
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.u32 ch_3_next_time
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.u32 ch_4_next_time
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.u32 ch_5_next_time
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.u32 ch_6_next_time
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.u32 ch_7_next_time
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.u32 ch_8_next_time
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.u32 ch_9_next_time
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.u32 ch_10_next_time
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.u32 ch_11_next_time
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.u32 ch_12_next_time
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.u32 time
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.u32 time_max
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.u32 time_cycle
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.u32 rcin_ram_pointer
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.u32 rcin_ram_pointer_index
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.u32 rcin_ram_pointer_index_max
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.u32 rcin_ram_pointer_head
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.u32 rcin_ram_pointer_tail
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.u32 temp
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.u32 temp1
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.u32 test
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.ends
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.assign RegisterStruct, R4, *, register
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.macro RCOUT_PWM
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.mparam RC_CH_X_PIN, CH_X_NEXT_TIME, CH_X_ENABLE, CH_X_PULSE_TIME_RAM_OFFSET, CH_X_T_TIME_RAM_OFFSET
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pwm:
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// Handle arithmetic and counter overflow, check if there is something to do
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sub register.temp, CH_X_NEXT_TIME, register.time
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mov register.temp1, 0xF0000000
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qbgt pwmend, register.temp, register.temp1
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mov CH_X_NEXT_TIME, register.time
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// Set pin or clear pin?
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qbbs pwmclear, RC_CH_X_PIN
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// Load pulse duration
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lbco register.temp, RAM, CH_X_PULSE_TIME_RAM_OFFSET, 4
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// Calculate time to next event
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add CH_X_NEXT_TIME, CH_X_NEXT_TIME, register.temp
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// Do not set pin if pulse time is 0
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qbeq pwmend, register.temp, 0
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// Check if channel is enabled
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qbbc pwmend, CH_X_ENABLE
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// Set pin
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set RC_CH_X_PIN
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jmp pwmend
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pwmclear:
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// Load pulse time
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lbco register.temp1, RAM, CH_X_PULSE_TIME_RAM_OFFSET, 4
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// Load T time
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lbco register.temp, RAM, CH_X_T_TIME_RAM_OFFSET, 4
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// Calculate time to next event (T - pulse duration)
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sub register.temp, register.temp, register.temp1
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add CH_X_NEXT_TIME, CH_X_NEXT_TIME, register.temp
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// Clear pin
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clr RC_CH_X_PIN
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pwmend:
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.endm
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.macro RCIN_ECAP_INIT
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// Initialize ECAP
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mov register.temp, (1 << ECAP_CTRRST1) | (1 << ECAP_CAP1POL) | (1 << ECAP_CTRRST2) | (1 << ECAP_CAPLDEN)
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sbco register.temp, ECAP, ECAP_ECCTL1, 4
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mov register.temp, (1 << ECAP_STOP_WRAP) | (1 << ECAP_TSCTRSTOP) | (2 << ECAP_SYNCO_SEL)
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sbco register.temp, ECAP, ECAP_ECCTL2, 4
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.endm
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.macro RCIN_ECAP
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// New value?
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lbco register.temp, ECAP, ECAP_ECFLG, 4
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qbbc rcin_ecap_end, register.temp.t2
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// Copy S0 and S1 duration to temp and temp1
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lbco register.temp, ECAP, ECAP_CAP1, 8
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// Copy S0 and S1 duration to RAM
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sbbo register.temp, register.rcin_ram_pointer, 0, 8
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// Clear event flags
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mov register.temp, (1 << ECAP_CEVT1) | (1 << ECAP_CEVT2)
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sbco register.temp, ECAP, ECAP_ECCLR, 4
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// Set new tail value
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RCIN_WRITE_TAIL register.rcin_ram_pointer_index
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// Update pointer
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add register.rcin_ram_pointer_index, register.rcin_ram_pointer_index, 1
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add register.rcin_ram_pointer, register.rcin_ram_pointer, 8
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// Check end of ringbuffer
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qblt rcin_ecap_end, register.rcin_ram_pointer_index_max, register.rcin_ram_pointer_index
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mov register.rcin_ram_pointer, RCIN_RINGBUFFER_RAM_OFFSET
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mov register.rcin_ram_pointer_index, 0
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rcin_ecap_end:
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.endm
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.macro RCIN_WRITE_HEAD
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.mparam RCIN_HEAD
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sbbo RCIN_HEAD, register.rcin_ram_pointer_head, 0, 2
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.endm
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.macro RCIN_WRITE_TAIL
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.mparam RCIN_TAIL
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sbbo RCIN_TAIL, register.rcin_ram_pointer_tail, 0, 2
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.endm
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.macro MAX_CYCLE_TIME
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lbco register.temp1, IEP, IEP_TMR_CNT, 4
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sub register.temp, register.temp1, register.time_cycle
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mov register.time_cycle, register.temp1
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max register.time_max, register.time_max, register.temp
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sbco register.time_max, RAM, MAX_CYCLE_TIME_OFFSET, 4
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.endm
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.macro INIT
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// Reset PWM pins
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mov r30, 0x0
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// Clear register
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zero ®ister, SIZE(register)
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// Initialize max cycle time
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mov register.temp, 0
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sbco register.temp, RAM, MAX_CYCLE_TIME_OFFSET, 4
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// Initialize ringbuffer
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mov register.rcin_ram_pointer, RCIN_RINGBUFFER_RAM_OFFSET
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mov register.rcin_ram_pointer_index_max, RCIN_RINGBUFFERSIZE
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mov register.rcin_ram_pointer_head, RCIN_RING_HEAD_OFFSET
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mov register.rcin_ram_pointer_tail, RCIN_RING_TAIL_OFFSET
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mov register.temp, 0
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RCIN_WRITE_HEAD register.temp
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RCIN_WRITE_TAIL register.temp
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// Load balancing
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mov register.ch_1_next_time, 1000
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mov register.ch_2_next_time, 2000
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mov register.ch_3_next_time, 3000
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mov register.ch_4_next_time, 4000
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mov register.ch_5_next_time, 5000
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mov register.ch_6_next_time, 6000
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mov register.ch_7_next_time, 7000
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mov register.ch_8_next_time, 8000
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mov register.ch_9_next_time, 9000
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mov register.ch_10_next_time, 10000
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mov register.ch_11_next_time, 11000
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mov register.ch_12_next_time, 12000
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// Disable all PWMs
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mov register.ch_enable, 0x0
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sbco register.ch_enable, RAM, CH_ENABLE_RAM_OFFSET, 4
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// Initialize PWM pulse (0us)
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mov register.temp, PWM_PULSE_DEFAULT
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sbco register.temp, RAM, CH_1_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_2_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_3_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_4_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_5_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_6_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_7_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_8_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_9_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_10_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_11_PULSE_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_12_PULSE_TIME_RAM_OFFSET, 4
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// Initialize PWM frequency (50Hz)
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mov register.temp, PWM_FREQ_DEFAULT
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sbco register.temp, RAM, CH_1_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_2_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_3_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_4_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_5_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_6_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_7_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_8_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_9_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_10_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_11_T_TIME_RAM_OFFSET, 4
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sbco register.temp, RAM, CH_12_T_TIME_RAM_OFFSET, 4
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// Initialize counter (1 step = 5ns)
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mov register.temp, 1 << IEP_DEFAULT_INC
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sbco register.temp, IEP, IEP_TMR_GLB_CFG, 4
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// Reset counter
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mov register.temp, 0xffffffff
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sbco register.temp, IEP, IEP_TMR_CNT, 4
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// Start counter
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lbco register.temp, IEP, IEP_TMR_GLB_CFG, 4
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or register.temp, register.temp, 1 << IEP_CNT_ENABLE
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sbco register.temp, IEP, IEP_TMR_GLB_CFG, 4
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.endm
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.origin 0
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init:
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INIT
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RCIN_ECAP_INIT
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mainloop:
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lbco register.ch_enable, RAM, CH_ENABLE_RAM_OFFSET, 4
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lbco register.time, IEP, IEP_TMR_CNT, 4
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RCOUT_PWM RC_CH_1_PIN, register.ch_1_next_time, RC_CH_1_ENABLE, CH_1_PULSE_TIME_RAM_OFFSET, CH_1_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_2_PIN, register.ch_2_next_time, RC_CH_2_ENABLE, CH_2_PULSE_TIME_RAM_OFFSET, CH_2_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_3_PIN, register.ch_3_next_time, RC_CH_3_ENABLE, CH_3_PULSE_TIME_RAM_OFFSET, CH_3_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_4_PIN, register.ch_4_next_time, RC_CH_4_ENABLE, CH_4_PULSE_TIME_RAM_OFFSET, CH_4_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_5_PIN, register.ch_5_next_time, RC_CH_5_ENABLE, CH_5_PULSE_TIME_RAM_OFFSET, CH_5_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_6_PIN, register.ch_6_next_time, RC_CH_6_ENABLE, CH_6_PULSE_TIME_RAM_OFFSET, CH_6_T_TIME_RAM_OFFSET
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#ifdef BBBLUE
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RCOUT_PWM RC_CH_7_PIN, register.ch_7_next_time, RC_CH_7_ENABLE, CH_7_PULSE_TIME_RAM_OFFSET, CH_7_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_8_PIN, register.ch_8_next_time, RC_CH_8_ENABLE, CH_8_PULSE_TIME_RAM_OFFSET, CH_8_T_TIME_RAM_OFFSET
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#endif
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#ifdef BBBMINI
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RCOUT_PWM RC_CH_7_PIN, register.ch_7_next_time, RC_CH_7_ENABLE, CH_7_PULSE_TIME_RAM_OFFSET, CH_7_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_8_PIN, register.ch_8_next_time, RC_CH_8_ENABLE, CH_8_PULSE_TIME_RAM_OFFSET, CH_8_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_9_PIN, register.ch_9_next_time, RC_CH_9_ENABLE, CH_9_PULSE_TIME_RAM_OFFSET, CH_9_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_10_PIN, register.ch_10_next_time, RC_CH_10_ENABLE, CH_10_PULSE_TIME_RAM_OFFSET, CH_10_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_11_PIN, register.ch_11_next_time, RC_CH_11_ENABLE, CH_11_PULSE_TIME_RAM_OFFSET, CH_11_T_TIME_RAM_OFFSET
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RCOUT_PWM RC_CH_12_PIN, register.ch_12_next_time, RC_CH_12_ENABLE, CH_12_PULSE_TIME_RAM_OFFSET, CH_12_T_TIME_RAM_OFFSET
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#endif
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RCIN_ECAP
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#ifdef DEBUG
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MAX_CYCLE_TIME
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#endif
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jmp mainloop
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