mirror of https://github.com/ArduPilot/ardupilot
302 lines
7.7 KiB
C
302 lines
7.7 KiB
C
/*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "stm32_util.h"
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stm32_dma.h>
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#include <hrt.h>
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static int64_t utc_time_offset;
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/*
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setup the timer capture digital filter for a channel
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*/
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void stm32_timer_set_input_filter(stm32_tim_t *tim, uint8_t channel, uint8_t filter_mode)
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{
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switch (channel) {
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case 0:
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tim->CCMR1 |= STM32_TIM_CCMR1_IC1F(filter_mode);
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break;
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case 1:
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tim->CCMR1 |= STM32_TIM_CCMR1_IC2F(filter_mode);
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break;
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case 2:
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tim->CCMR2 |= STM32_TIM_CCMR2_IC3F(filter_mode);
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break;
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case 3:
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tim->CCMR2 |= STM32_TIM_CCMR2_IC4F(filter_mode);
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break;
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}
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}
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/*
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set the input source of a timer channel
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*/
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void stm32_timer_set_channel_input(stm32_tim_t *tim, uint8_t channel, uint8_t input_source)
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{
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switch (channel) {
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case 0:
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tim->CCER &= ~STM32_TIM_CCER_CC1E;
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tim->CCMR1 &= ~STM32_TIM_CCMR1_CC1S_MASK;
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tim->CCMR1 |= STM32_TIM_CCMR1_CC1S(input_source);
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tim->CCER |= STM32_TIM_CCER_CC1E;
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break;
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case 1:
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tim->CCER &= ~STM32_TIM_CCER_CC2E;
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tim->CCMR1 &= ~STM32_TIM_CCMR1_CC2S_MASK;
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tim->CCMR1 |= STM32_TIM_CCMR1_CC2S(input_source);
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tim->CCER |= STM32_TIM_CCER_CC2E;
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break;
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case 2:
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tim->CCER &= ~STM32_TIM_CCER_CC3E;
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tim->CCMR2 &= ~STM32_TIM_CCMR2_CC3S_MASK;
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tim->CCMR2 |= STM32_TIM_CCMR2_CC3S(input_source);
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tim->CCER |= STM32_TIM_CCER_CC3E;
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break;
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case 3:
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tim->CCER &= ~STM32_TIM_CCER_CC4E;
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tim->CCMR2 &= ~STM32_TIM_CCMR2_CC4S_MASK;
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tim->CCMR2 |= STM32_TIM_CCMR2_CC4S(input_source);
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tim->CCER |= STM32_TIM_CCER_CC4E;
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break;
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}
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}
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#if CH_DBG_ENABLE_STACK_CHECK == TRUE
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void show_stack_usage(void)
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{
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thread_t *tp;
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tp = chRegFirstThread();
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do {
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uint32_t stklimit = (uint32_t)tp->wabase;
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uint8_t *p = (uint8_t *)tp->wabase;
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while (*p == CH_DBG_STACK_FILL_VALUE) {
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p++;
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}
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uint32_t stack_left = ((uint32_t)p) - stklimit;
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printf("%s %u\n", tp->name, (unsigned)stack_left);
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tp = chRegNextThread(tp);
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} while (tp != NULL);
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}
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#endif
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/*
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flush all memory. Used in chSysHalt()
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*/
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void memory_flush_all(void)
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{
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#if defined(STM32F7) && STM32_DMA_CACHE_HANDLING == TRUE
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dmaBufferFlush(HAL_RAM_BASE_ADDRESS, HAL_RAM_SIZE_KB * 1024U);
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#endif
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}
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/*
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set the utc time
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*/
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void stm32_set_utc_usec(uint64_t time_utc_usec)
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{
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uint64_t now = hrt_micros();
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if (now <= time_utc_usec) {
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utc_time_offset = time_utc_usec - now;
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}
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}
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/*
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get system clock in UTC microseconds
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*/
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uint64_t stm32_get_utc_usec()
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{
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return hrt_micros() + utc_time_offset;
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}
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struct utc_tm {
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uint8_t tm_year; // since 1900
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uint8_t tm_mon; // zero based
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uint8_t tm_mday; // zero based
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uint8_t tm_hour;
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uint8_t tm_min;
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uint8_t tm_sec;
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};
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/*
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return true if a year is a leap year
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*/
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static bool is_leap(uint32_t y)
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{
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y += 1900;
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return (y % 4) == 0 && ((y % 100) != 0 || (y % 400) == 0);
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}
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static const uint8_t ndays[2][12] ={
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{31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31},
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{31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}};
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/*
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parse a seconds since 1970 into a utc_tm structure
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code based on _der_gmtime from samba
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*/
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static void parse_utc_seconds(uint64_t utc_sec, struct utc_tm *tm)
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{
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uint32_t secday = utc_sec % (3600U * 24U);
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uint32_t days = utc_sec / (3600U * 24U);
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memset(tm, 0, sizeof(*tm));
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tm->tm_sec = secday % 60U;
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tm->tm_min = (secday % 3600U) / 60U;
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tm->tm_hour = secday / 3600U;
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tm->tm_year = 70;
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if (days > (2000 * 365)) {
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// don't look for dates too far into the future
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return;
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}
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while (true) {
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unsigned dayinyear = (is_leap(tm->tm_year) ? 366 : 365);
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if (days < dayinyear) {
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break;
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}
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tm->tm_year += 1;
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days -= dayinyear;
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}
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tm->tm_mon = 0;
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while (true) {
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unsigned daysinmonth = ndays[is_leap(tm->tm_year)?1:0][tm->tm_mon];
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if (days < daysinmonth) {
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break;
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}
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days -= daysinmonth;
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tm->tm_mon++;
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}
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tm->tm_mday = days + 1;
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}
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/*
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get time for fat filesystem. This is based on
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rtcConvertDateTimeToFAT from the ChibiOS RTC driver. We don't use
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the hw RTC clock as it is very inaccurate
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*/
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uint32_t get_fattime()
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{
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if (utc_time_offset == 0) {
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// return a fixed time
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return ((uint32_t)0 | (1 << 16)) | (1 << 21);
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}
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uint64_t utc_usec = stm32_get_utc_usec();
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uint64_t utc_sec = utc_usec / 1000000UL;
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struct utc_tm tm;
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parse_utc_seconds(utc_sec, &tm);
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uint32_t fattime;
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fattime = tm.tm_sec >> 1U;
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fattime |= tm.tm_min << 5U;
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fattime |= tm.tm_hour << 11U;
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fattime |= tm.tm_mday << 16U;
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fattime |= (tm.tm_mon+1) << 21U;
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fattime |= (uint32_t)((tm.tm_year-80) << 25U);
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return fattime;
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}
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// get RTC backup register 0
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static uint32_t get_rtc_backup0(void)
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{
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return RTC->BKP0R;
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}
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// set RTC backup register 0
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static void set_rtc_backup0(uint32_t v)
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{
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if ((RCC->BDCR & RCC_BDCR_RTCEN) == 0) {
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RCC->BDCR |= STM32_RTCSEL;
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RCC->BDCR |= RCC_BDCR_RTCEN;
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}
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#ifdef PWR_CR_DBP
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PWR->CR |= PWR_CR_DBP;
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#else
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PWR->CR1 |= PWR_CR1_DBP;
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#endif
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RTC->BKP0R = v;
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}
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// see if RTC registers is setup for a fast reboot
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enum rtc_boot_magic check_fast_reboot(void)
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{
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return (enum rtc_boot_magic)get_rtc_backup0();
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}
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// set RTC register for a fast reboot
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void set_fast_reboot(enum rtc_boot_magic v)
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{
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set_rtc_backup0(v);
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}
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/*
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enable peripheral power if needed This is done late to prevent
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problems with CTS causing SiK radios to stay in the bootloader. A
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SiK radio will stay in the bootloader if CTS is held to GND on boot
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*/
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void peripheral_power_enable(void)
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{
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#if defined(HAL_GPIO_PIN_nVDD_5V_PERIPH_EN) || defined(HAL_GPIO_PIN_nVDD_5V_HIPOWER_EN)
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// we don't know what state the bootloader had the CTS pin in, so
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// wait here with it pulled up from the PAL table for enough time
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// for the radio to be definately powered down
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uint8_t i;
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for (i=0; i<100; i++) {
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// use a loop as this may be a 16 bit timer
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chThdSleep(MS2ST(1));
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}
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#ifdef HAL_GPIO_PIN_nVDD_5V_PERIPH_EN
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palWriteLine(HAL_GPIO_PIN_nVDD_5V_PERIPH_EN, 0);
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#endif
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#ifdef HAL_GPIO_PIN_nVDD_5V_HIPOWER_EN
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palWriteLine(HAL_GPIO_PIN_nVDD_5V_HIPOWER_EN, 0);
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#endif
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#endif
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}
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#if defined(STM32F7) || defined(STM32F4)
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/*
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read mode of a pin. This allows a pin config to be read, changed and
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then written back
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*/
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iomode_t palReadLineMode(ioline_t line)
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{
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ioportid_t port = PAL_PORT(line);
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uint8_t pad = PAL_PAD(line);
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iomode_t ret = 0;
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ret |= (port->MODER >> (pad*2)) & 0x3;
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ret |= ((port->OTYPER >> pad)&1) << 2;
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ret |= ((port->OSPEEDR >> (pad*2))&3) << 3;
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ret |= ((port->PUPDR >> (pad*2))&3) << 5;
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if (pad < 8) {
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ret |= ((port->AFRL >> (pad*4))&0xF) << 7;
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} else {
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ret |= ((port->AFRH >> ((pad-8)*4))&0xF) << 7;
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}
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return ret;
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}
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#endif
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