mirror of https://github.com/ArduPilot/ardupilot
290 lines
8.9 KiB
C++
290 lines
8.9 KiB
C++
/*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "I2CDevice.h"
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#include <AP_HAL/AP_HAL.h>
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#include <AP_Math/AP_Math.h>
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#include "Util.h"
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#include "Scheduler.h"
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_I2C == TRUE
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static const struct I2CInfo {
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struct I2CDriver *i2c;
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uint8_t dma_channel_rx;
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uint8_t dma_channel_tx;
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} I2CD[] = { HAL_I2C_DEVICE_LIST };
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using namespace ChibiOS;
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extern const AP_HAL::HAL& hal;
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I2CBus I2CDeviceManager::businfo[ARRAY_SIZE_SIMPLE(I2CD)];
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#ifndef HAL_I2C_BUS_BASE
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#define HAL_I2C_BUS_BASE 0
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#endif
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// default to 100kHz clock for maximum reliability. This can be
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// changed in hwdef.dat
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#ifndef HAL_I2C_MAX_CLOCK
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#define HAL_I2C_MAX_CLOCK 100000
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#endif
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// get a handle for DMA sharing DMA channels with other subsystems
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void I2CBus::dma_init(void)
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{
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dma_handle = new Shared_DMA(I2CD[busnum].dma_channel_tx, I2CD[busnum].dma_channel_rx,
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FUNCTOR_BIND_MEMBER(&I2CBus::dma_allocate, void),
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FUNCTOR_BIND_MEMBER(&I2CBus::dma_deallocate, void));
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}
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// Clear Bus to avoid bus lockup
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void I2CBus::clear_all()
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{
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#if defined(HAL_GPIO_PIN_I2C1_SCL) && defined(HAL_I2C1_SCL_AF)
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clear_bus(HAL_GPIO_PIN_I2C1_SCL, HAL_I2C1_SCL_AF);
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#endif
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#if defined(HAL_GPIO_PIN_I2C2_SCL) && defined(HAL_I2C2_SCL_AF)
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clear_bus(HAL_GPIO_PIN_I2C2_SCL, HAL_I2C2_SCL_AF);
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#endif
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#if defined(HAL_GPIO_PIN_I2C3_SCL) && defined(HAL_I2C3_SCL_AF)
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clear_bus(HAL_GPIO_PIN_I2C3_SCL, HAL_I2C3_SCL_AF);
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#endif
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#if defined(HAL_GPIO_PIN_I2C4_SCL) && defined(HAL_I2C4_SCL_AF)
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clear_bus(HAL_GPIO_PIN_I2C4_SCL, HAL_I2C4_SCL_AF);
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#endif
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}
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//This code blocks!
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void I2CBus::clear_bus(ioline_t scl_line, uint8_t scl_af)
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{
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//send dummy clock
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palSetLineMode(scl_line, PAL_MODE_OUTPUT_PUSHPULL);
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for(int i = 0; i < 20; i++) {
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palToggleLine(scl_line);
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hal.scheduler->delay_microseconds(200);
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}
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palSetLineMode(scl_line, PAL_MODE_ALTERNATE(scl_af) | PAL_STM32_OSPEED_MID2 | PAL_STM32_OTYPE_OPENDRAIN);
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}
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// setup I2C buses
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I2CDeviceManager::I2CDeviceManager(void)
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{
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for (uint8_t i=0; i<ARRAY_SIZE_SIMPLE(I2CD); i++) {
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businfo[i].busnum = i;
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businfo[i].dma_init();
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/*
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setup default I2C config. As each device is opened we will
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drop the speed to be the minimum speed requested
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*/
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businfo[i].i2ccfg.op_mode = OPMODE_I2C;
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businfo[i].i2ccfg.clock_speed = HAL_I2C_MAX_CLOCK;
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if (businfo[i].i2ccfg.clock_speed <= 100000) {
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businfo[i].i2ccfg.duty_cycle = STD_DUTY_CYCLE;
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} else {
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businfo[i].i2ccfg.duty_cycle = FAST_DUTY_CYCLE_2;
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}
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}
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}
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I2CDevice::I2CDevice(uint8_t busnum, uint8_t address, uint32_t bus_clock, bool use_smbus, uint32_t timeout_ms) :
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_retries(2),
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_address(address),
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_use_smbus(use_smbus),
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_timeout_ms(timeout_ms),
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bus(I2CDeviceManager::businfo[busnum])
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{
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set_device_bus(busnum+HAL_I2C_BUS_BASE);
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set_device_address(address);
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asprintf(&pname, "I2C:%u:%02x",
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(unsigned)busnum, (unsigned)address);
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if (bus_clock < bus.i2ccfg.clock_speed) {
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bus.i2ccfg.clock_speed = bus_clock;
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hal.console->printf("I2C%u clock %ukHz\n", busnum, unsigned(bus_clock/1000));
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if (bus_clock <= 100000) {
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bus.i2ccfg.duty_cycle = STD_DUTY_CYCLE;
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}
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}
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}
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I2CDevice::~I2CDevice()
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{
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printf("I2C device bus %u address 0x%02x closed\n",
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(unsigned)bus.busnum, (unsigned)_address);
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free(pname);
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}
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/*
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allocate DMA channel
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*/
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void I2CBus::dma_allocate(void)
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{
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if (!i2c_started) {
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osalDbgAssert(I2CD[busnum].i2c->state == I2C_STOP, "i2cStart state");
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i2cStart(I2CD[busnum].i2c, &i2ccfg);
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osalDbgAssert(I2CD[busnum].i2c->state == I2C_READY, "i2cStart state");
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i2c_started = true;
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}
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}
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/*
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deallocate DMA channel
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*/
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void I2CBus::dma_deallocate(void)
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{
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if (i2c_started) {
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osalDbgAssert(I2CD[busnum].i2c->state == I2C_READY, "i2cStart state");
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i2cStop(I2CD[busnum].i2c);
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osalDbgAssert(I2CD[busnum].i2c->state == I2C_STOP, "i2cStart state");
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i2c_started = false;
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}
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}
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bool I2CDevice::transfer(const uint8_t *send, uint32_t send_len,
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uint8_t *recv, uint32_t recv_len)
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{
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if (!bus.semaphore.check_owner()) {
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hal.console->printf("I2C: not owner of 0x%x\n", (unsigned)get_bus_id());
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return false;
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}
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bus.dma_handle->lock();
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if (_use_smbus) {
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bus.i2ccfg.op_mode = OPMODE_SMBUS_HOST;
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} else {
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bus.i2ccfg.op_mode = OPMODE_I2C;
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}
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if (_split_transfers) {
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/*
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splitting the transfer() into two pieces avoids a stop condition
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with SCL low which is not supported on some devices (such as
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LidarLite blue label)
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*/
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if (send && send_len) {
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if (!_transfer(send, send_len, nullptr, 0)) {
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bus.dma_handle->unlock();
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return false;
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}
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}
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if (recv && recv_len) {
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if (!_transfer(nullptr, 0, recv, recv_len)) {
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bus.dma_handle->unlock();
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return false;
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}
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}
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} else {
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// combined transfer
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if (!_transfer(send, send_len, recv, recv_len)) {
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bus.dma_handle->unlock();
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return false;
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}
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}
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bus.dma_handle->unlock();
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return true;
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}
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bool I2CDevice::_transfer(const uint8_t *send, uint32_t send_len,
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uint8_t *recv, uint32_t recv_len)
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{
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uint8_t *recv_buf = recv;
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const uint8_t *send_buf = send;
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bus.bouncebuffer_setup(send_buf, send_len, recv_buf, recv_len);
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i2cAcquireBus(I2CD[bus.busnum].i2c);
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for(uint8_t i=0 ; i <= _retries; i++) {
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int ret;
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// calculate a timeout as twice the expected transfer time, and set as min of 4ms
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uint32_t timeout_ms = 1+2*(((8*1000000UL/bus.i2ccfg.clock_speed)*MAX(send_len, recv_len))/1000);
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timeout_ms = MAX(timeout_ms, _timeout_ms);
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bus.i2c_active = true;
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osalDbgAssert(I2CD[bus.busnum].i2c->state == I2C_READY, "i2cStart state");
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if(send_len == 0) {
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ret = i2cMasterReceiveTimeout(I2CD[bus.busnum].i2c, _address, recv_buf, recv_len, MS2ST(timeout_ms));
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} else {
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ret = i2cMasterTransmitTimeout(I2CD[bus.busnum].i2c, _address, send_buf, send_len,
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recv_buf, recv_len, MS2ST(timeout_ms));
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}
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bus.i2c_active = false;
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if (ret != MSG_OK) {
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//restart the bus
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osalDbgAssert(I2CD[bus.busnum].i2c->state == I2C_READY || I2CD[bus.busnum].i2c->state == I2C_LOCKED, "i2cStart state");
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i2cStop(I2CD[bus.busnum].i2c);
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osalDbgAssert(I2CD[bus.busnum].i2c->state == I2C_STOP, "i2cStart state");
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i2cStart(I2CD[bus.busnum].i2c, &bus.i2ccfg);
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osalDbgAssert(I2CD[bus.busnum].i2c->state == I2C_READY, "i2cStart state");
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} else {
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osalDbgAssert(I2CD[bus.busnum].i2c->state == I2C_READY, "i2cStart state");
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if (recv_buf != recv) {
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memcpy(recv, recv_buf, recv_len);
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}
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i2cReleaseBus(I2CD[bus.busnum].i2c);
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return true;
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}
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}
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i2cReleaseBus(I2CD[bus.busnum].i2c);
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return false;
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}
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bool I2CDevice::read_registers_multiple(uint8_t first_reg, uint8_t *recv,
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uint32_t recv_len, uint8_t times)
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{
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return false;
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}
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/*
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register a periodic callback
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*/
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AP_HAL::Device::PeriodicHandle I2CDevice::register_periodic_callback(uint32_t period_usec, AP_HAL::Device::PeriodicCb cb)
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{
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return bus.register_periodic_callback(period_usec, cb, this);
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}
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/*
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adjust a periodic callback
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*/
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bool I2CDevice::adjust_periodic_callback(AP_HAL::Device::PeriodicHandle h, uint32_t period_usec)
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{
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return bus.adjust_timer(h, period_usec);
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}
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AP_HAL::OwnPtr<AP_HAL::I2CDevice>
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I2CDeviceManager::get_device(uint8_t bus, uint8_t address,
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uint32_t bus_clock,
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bool use_smbus,
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uint32_t timeout_ms)
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{
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bus -= HAL_I2C_BUS_BASE;
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if (bus >= ARRAY_SIZE_SIMPLE(I2CD)) {
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return AP_HAL::OwnPtr<AP_HAL::I2CDevice>(nullptr);
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}
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auto dev = AP_HAL::OwnPtr<AP_HAL::I2CDevice>(new I2CDevice(bus, address, bus_clock, use_smbus, timeout_ms));
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return dev;
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}
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#endif // HAL_USE_I2C
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