mirror of
https://github.com/ArduPilot/ardupilot
synced 2025-01-06 16:08:28 -04:00
39f44147b8
this changes the heuristics for UART TX DMA allocation to greatly reduce the chances of DMA contention causing long delays on other devices This fixes issues with FETTec driver output and gimbal status messages as reported by Amilcar and OlliW. The problem is particularly bad when no GPS is connected to GPS1 on fmuv3 and derived boards (such as CubeBlack) key changes: - remember the contention_counter across begin() calls, as the GPS calls begin with new baudrates regularly - added a is_shared() API to Shared_DMA, allowing the UART driver to avoid TX DMA on shared streams when at low baudrates.
582 lines
21 KiB
Python
Executable File
582 lines
21 KiB
Python
Executable File
#!/usr/bin/env python
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import sys, fnmatch
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import importlib
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# peripheral types that can be shared, wildcard patterns
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SHARED_MAP = ["I2C*", "USART*_TX", "UART*_TX", "SPI*", "TIM*_UP", "TIM*_CH*"]
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ignore_list = []
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dma_map = None
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debug = False
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def check_possibility(periph, dma_stream, curr_dict, dma_map, check_list, cannot_use_stream, forbidden_map):
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global ignore_list
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if debug:
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print('............ Checking ', periph, dma_stream, 'without', cannot_use_stream)
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for other_periph in curr_dict:
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if other_periph != periph:
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if curr_dict[other_periph] == dma_stream:
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if other_periph in forbidden_map[periph]:
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if debug:
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print('.................... Forbidden', periph, other_periph)
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return False
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if debug:
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print('.................... Collision', other_periph, dma_stream)
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ignore_list.append(periph)
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check_str = "%s(%d,%d) %s(%d,%d)" % (
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other_periph, curr_dict[other_periph][0],
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curr_dict[other_periph][1], periph, dma_stream[0],
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dma_stream[1])
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#check if we did this before
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if check_str in check_list:
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return False
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check_list.append(check_str)
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if debug:
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print("Trying to Resolve Conflict: ", check_str)
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#check if we can resolve by swapping with other periphs
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for streamchan in dma_map[other_periph]:
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stream = (streamchan[0], streamchan[1])
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if stream != curr_dict[other_periph] and \
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stream not in cannot_use_stream and \
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check_possibility(other_periph, stream, curr_dict, dma_map, check_list,
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cannot_use_stream+[(dma_stream)], forbidden_map):
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curr_dict[other_periph] = stream
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if debug:
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print ('....................... Resolving', other_periph, stream)
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return True
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if debug:
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print ('....................... UnSolved !!!!!!!!', periph, dma_stream)
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return False
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if debug:
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print ('....................... Solved ..........', periph, dma_stream)
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return True
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def can_share(periph, noshare_list):
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'''check if a peripheral is in the SHARED_MAP list'''
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for noshare in noshare_list:
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if fnmatch.fnmatch(periph, noshare):
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return False
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for f in SHARED_MAP:
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if fnmatch.fnmatch(periph, f):
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return True
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if debug:
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print("%s can't share" % periph)
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return False
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# list of peripherals on H7 that are on DMAMUX2 and BDMA
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have_DMAMUX = False
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DMAMUX2_peripherals = [ 'I2C4', 'SPI6', 'ADC3' ]
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def dmamux_channel(key):
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'''return DMAMUX channel for H7'''
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for p in DMAMUX2_peripherals:
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if key.find(p) != -1:
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return 'STM32_DMAMUX2_' + key
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# default to DMAMUX1
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return 'STM32_DMAMUX1_' + key
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def dma_name(key):
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'''return 'DMA' or 'BDMA' based on peripheral name'''
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if not have_DMAMUX:
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return "DMA"
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for p in DMAMUX2_peripherals:
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if key.find(p) != -1:
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return 'BDMA'
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return 'DMA'
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def chibios_dma_define_name(key):
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'''return define name needed for board.h for ChibiOS'''
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dma_key = key + '_' + dma_name(key)
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if key.startswith('ADC'):
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return 'STM32_ADC_%s_' % dma_key
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elif key.startswith('SPI'):
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return 'STM32_SPI_%s_' % dma_key
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elif key.startswith('I2C'):
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return 'STM32_I2C_%s_' % dma_key
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elif key.startswith('USART'):
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return 'STM32_UART_%s_' % dma_key
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elif key.startswith('UART'):
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return 'STM32_UART_%s_' % dma_key
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elif key.startswith('SDIO') or key.startswith('SDMMC'):
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return 'STM32_SDC_%s_' % dma_key
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elif key.startswith('TIM'):
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return 'STM32_TIM_%s_' % dma_key
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else:
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print("Error: Unknown key type %s" % key)
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sys.exit(1)
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def get_list_index(peripheral, priority_list):
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'''return index into priority_list for a peripheral'''
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for i in range(len(priority_list)):
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str = priority_list[i]
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if fnmatch.fnmatch(peripheral, str):
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return i
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# default to max priority
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return len(priority_list)
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def get_sharing_priority(periph_list, priority_list):
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'''get priority of a list of peripherals we could share with'''
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highest = len(priority_list)
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for p in periph_list:
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prio = get_list_index(p, priority_list)
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if prio < highest:
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highest = prio
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return highest
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def generate_DMAMUX_map_mask(peripheral_list, channel_mask, noshare_list, dma_exclude, stream_ofs):
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'''
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generate a dma map suitable for a board with a DMAMUX
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In principle any peripheral can use any stream, but we need to
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ensure that a peripheral doesn't try to use the same stream as its
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partner (eg. a RX/TX pair)
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'''
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dma_map = {}
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idsets = {}
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# first unshareable peripherals
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available = channel_mask
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for p in peripheral_list:
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dma_map[p] = []
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idsets[p] = set()
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for p in peripheral_list:
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if can_share(p, noshare_list) or p in dma_exclude:
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continue
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for i in range(16):
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mask = (1<<i)
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if available & mask != 0:
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available &= ~mask
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dma = (i // 8) + 1
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stream = i % 8
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dma_map[p].append((dma,stream))
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idsets[p].add(i)
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break
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if debug:
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print('dma_map1: ', dma_map)
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print('available: 0x%04x' % available)
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# now shareable
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idx = 0
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for p in peripheral_list:
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if not can_share(p, noshare_list) or p in dma_exclude:
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continue
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base = idx % 16
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for i in range(16):
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found = None
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for ii in list(range(base,16)) + list(range(0,base)):
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if (1<<ii) & available == 0:
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continue
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dma = (ii // 8) + 1
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stream = ii % 8
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if (dma,stream) in dma_map[p]:
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# this peripheral is already using the stream
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continue
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# prevent attempts to share with other half of same peripheral
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if p.endswith('RX'):
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other = p[:-2] + 'TX'
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elif p.endswith('TX'):
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other = p[:-2] + 'RX'
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else:
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other = None
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if other is not None and other in idsets and ii in idsets[other]:
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if len(idsets[p]) >= len(idsets[other]) and len(idsets[other]) > 0:
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continue
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idsets[other].remove(ii)
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dma_map[other].remove((dma,stream))
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found = ii
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break
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if found is None:
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continue
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base = (found+1) % 16
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dma = (found // 8) + 1
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stream = found % 8
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dma_map[p].append((dma,stream))
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idsets[p].add(found)
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idx = (idx+1) % 16
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if stream_ofs != 0:
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# add in stream_ofs to cope with STM32G4
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for p in dma_map.keys():
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for (dma,stream) in dma_map[p]:
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map2 = []
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map2.append((dma,stream+stream_ofs))
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dma_map[p] = map2
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if debug:
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print('dma_map: ', dma_map)
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print('idsets: ', idsets)
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print('available: 0x%04x' % available)
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return dma_map
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def generate_DMAMUX_map(peripheral_list, noshare_list, dma_exclude, stream_ofs):
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'''
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generate a dma map suitable for a board with a DMAMUX1 and DMAMUX2
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'''
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# first split peripheral_list into those for DMAMUX1 and those for DMAMUX2
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dmamux1_peripherals = []
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dmamux2_peripherals = []
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for p in peripheral_list:
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if dma_name(p) == 'BDMA':
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dmamux2_peripherals.append(p)
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else:
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dmamux1_peripherals.append(p)
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map1 = generate_DMAMUX_map_mask(dmamux1_peripherals, 0xFFFF, noshare_list, dma_exclude, stream_ofs)
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# there are 8 BDMA streams, but an issue has been found where if I2C4 and
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# SPI6 use neighboring streams then we sometimes lose a BDMA completion
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# interrupt. We also found that both ADC3 and SPI6_RX can't use the first
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# stream. To avoid more complications we now statically allocate the BDMA
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# streams for the 3 possible peripherals. To keep this code simpler we
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# still have the mapping code here, but it ends not not being used and the
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# static allocation is in stm32h7_mcuconf.h
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map2 = generate_DMAMUX_map_mask(dmamux2_peripherals, 0xff, noshare_list, dma_exclude, stream_ofs)
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# translate entries from map2 to "DMA controller 3", which is used for BDMA
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for p in map2.keys():
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streams = []
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for (controller,stream) in map2[p]:
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streams.append((3,stream))
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map2[p] = streams
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both = map1
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both.update(map2)
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if debug:
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print('dma_map_both: ', both)
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return both
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def sharing_allowed(p1, p2):
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'''return true if sharing is allowed between p1 and p2'''
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if p1 == p2:
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return True
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# don't allow RX and TX of same peripheral to share
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if p1.endswith('_RX') and p2.endswith('_TX') and p1[:-2] == p2[:-2]:
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return False
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# don't allow sharing of two TIMn_UP channels as DShot code can't cope
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if p1.endswith("_UP") and p2.endswith("_UP") and p1.startswith("TIM") and p2.startswith("TIM"):
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return False
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return True
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def check_sharing(shared):
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'''check if DMA channel sharing is OK'''
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for p in shared:
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# don't share UART RX with anything
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if (p.startswith("UART") or p.startswith("USART")) and p.endswith("_RX"):
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print("Illegal sharing of %s" % p)
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return False
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# don't share ADC with anything
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if p.startswith("ADC"):
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print("Illegal sharing of %s" % p)
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return False
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for p2 in shared:
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if not sharing_allowed(p, p2):
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print("Illegal sharing of %s and %s" % (p, p2))
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return False
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return True
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def forbidden_list(p, peripheral_list):
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'''given a peripheral, form a list of other peripherals we may not share with'''
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ret = []
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for p2 in peripheral_list:
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if not sharing_allowed(p, p2):
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ret.append(p2)
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return ret
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def write_dma_header(f, peripheral_list, mcu_type, dma_exclude=[],
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dma_priority='', dma_noshare=[]):
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'''write out a DMA resolver header file'''
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global dma_map, have_DMAMUX, has_bdshot
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timer_ch_periph = []
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has_bdshot = False
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# form a list of DMA priorities
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priority_list = dma_priority.split()
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# sort by priority
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peripheral_list = sorted(peripheral_list, key=lambda x: get_list_index(x, priority_list))
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# form a list of peripherals that can't share
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noshare_list = dma_noshare[:]
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try:
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lib = importlib.import_module(mcu_type)
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if hasattr(lib, "DMA_Map"):
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dma_map = lib.DMA_Map
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else:
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return [], []
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except ImportError:
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print("Unable to find module for MCU %s" % mcu_type)
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sys.exit(1)
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if dma_map is None:
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have_DMAMUX = True
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# ensure we don't assign dma for TIMx_CH as we share that with TIMx_UP
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timer_ch_periph = [periph for periph in peripheral_list if "_CH" in periph]
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dma_exclude += timer_ch_periph
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if mcu_type.startswith("STM32G4"):
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stream_ofs = 1
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else:
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stream_ofs = 0
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dma_map = generate_DMAMUX_map(peripheral_list, noshare_list, dma_exclude, stream_ofs)
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print("Writing DMA map")
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unassigned = []
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curr_dict = {}
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# build a map from peripheral name to a list of peripherals that it cannot share with
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forbidden_map = {}
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for p in peripheral_list:
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forbidden_map[p] = forbidden_list(p, peripheral_list)
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for periph in peripheral_list:
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if "_CH" in periph:
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has_bdshot = True # the list contains a CH port
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if periph in dma_exclude:
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continue
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assigned = False
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check_list = []
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if not periph in dma_map:
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print("Unknown peripheral function %s in DMA map for %s" %
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(periph, mcu_type))
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sys.exit(1)
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if debug:
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print('\n\n.....Starting lookup for', periph)
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for streamchan in dma_map[periph]:
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if debug:
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print('........Possibility for', periph, streamchan)
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stream = (streamchan[0], streamchan[1])
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if check_possibility(periph, stream, curr_dict, dma_map,
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check_list, [], forbidden_map):
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curr_dict[periph] = stream
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if debug:
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print ('....................... Setting', periph, stream)
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assigned = True
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break
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if assigned == False:
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unassigned.append(periph)
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if debug:
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print('curr_dict: ', curr_dict)
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print('unassigned: ', unassigned)
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# now look for shared DMA possibilities
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stream_assign = {}
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for k in curr_dict.keys():
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p = curr_dict[k]
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if not p in stream_assign:
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stream_assign[p] = [k]
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else:
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stream_assign[p].append(k)
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unassigned_new = unassigned[:]
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for periph in unassigned:
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share_possibility = []
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for streamchan in dma_map[periph]:
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stream = (streamchan[0], streamchan[1])
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share_ok = True
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for periph2 in stream_assign[stream]:
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if not can_share(periph, noshare_list) or not can_share(periph2, noshare_list) or periph2 in forbidden_map[periph]:
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share_ok = False
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if share_ok:
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share_possibility.append(stream)
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if share_possibility:
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# sort the possible sharings so minimise impact on high priority streams
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share_possibility = sorted(share_possibility, key=lambda x: get_sharing_priority(stream_assign[x], priority_list))
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# and take the one with the least impact (lowest value for highest priority stream share)
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stream = share_possibility[-1]
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if debug:
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print("Sharing %s on %s with %s" % (periph, stream,
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stream_assign[stream]))
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curr_dict[periph] = stream
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stream_assign[stream].append(periph)
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unassigned_new.remove(periph)
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unassigned = unassigned_new
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for key in sorted(curr_dict.keys()):
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stream = curr_dict[key]
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if len(stream_assign[stream]) > 1:
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if not check_sharing(stream_assign[stream]):
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sys.exit(1)
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if debug:
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print(stream_assign)
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f.write("\n\n// auto-generated DMA mapping from dma_resolver.py\n")
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if unassigned:
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f.write(
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"\n// Note: The following peripherals can't be resolved for DMA: %s\n\n"
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% unassigned)
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ordered_up_channels = []
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# produce a list of timers ordered by the DMA streamid of the UP channel
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# this is so that the dshot code can take out the UP DMA locks in the same order as I2C and SPI
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for key in curr_dict.keys():
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if "_UP" in key:
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ordered_up_channels.append(key)
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def order_by_streamid(key):
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stream = curr_dict[key]
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return (stream[0] * 8 + stream[1]) * 20 + int(key[3:-3])
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ordered_up_channels = sorted(ordered_up_channels, key=order_by_streamid)
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ordered_timers = []
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for key in ordered_up_channels:
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ordered_timers.append(key[0:-3])
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shared_set = set()
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for key in sorted(curr_dict.keys()):
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stream = curr_dict[key]
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shared = ''
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if len(stream_assign[stream]) > 1:
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shared = ' // shared %s' % ','.join(stream_assign[stream])
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if stream[0] in [1,2]:
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shared_set.add("(1U<<STM32_DMA_STREAM_ID(%u,%u))" % (stream[0],stream[1]))
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if curr_dict[key] == "STM32_DMA_STREAM_ID_ANY":
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f.write("#define %-30s STM32_DMA_STREAM_ID_ANY\n" % (chibios_dma_define_name(key)+'STREAM'))
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f.write("#define %-30s %s\n" % (chibios_dma_define_name(key)+'CHAN', dmamux_channel(key)))
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continue
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else:
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dma_controller = curr_dict[key][0]
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if dma_controller == 3:
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# BDMA resources turn out to be very strange on H743. For now
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# we will skip trying to allocate them automatically and
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# instead rely on allocation in stm32h7_mcuconf.h.
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continue
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else:
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f.write("#define %-30s STM32_DMA_STREAM_ID(%u, %u)%s\n" %
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(chibios_dma_define_name(key)+'STREAM', dma_controller,
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curr_dict[key][1], shared))
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if have_DMAMUX and "_UP" in key:
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# share the dma with rest of the _CH ports
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for ch in range(1,5):
|
|
chkey = key.replace('_UP', '_CH{}'.format(ch))
|
|
if chkey not in timer_ch_periph:
|
|
continue
|
|
f.write("#define %-30s STM32_DMA_STREAM_ID(%u, %u)%s\n" %
|
|
(chibios_dma_define_name(chkey)+'STREAM', dma_controller,
|
|
curr_dict[key][1], shared))
|
|
for streamchan in dma_map[key]:
|
|
if stream == (streamchan[0], streamchan[1]):
|
|
if have_DMAMUX:
|
|
chan = dmamux_channel(key)
|
|
else:
|
|
chan = streamchan[2]
|
|
f.write("#define %-30s %s\n" %
|
|
(chibios_dma_define_name(key)+'CHAN', chan))
|
|
if have_DMAMUX and "_UP" in key:
|
|
# share the devid with rest of the _CH ports
|
|
for ch in range(1,5):
|
|
chkey = key.replace('_UP', '_CH{}'.format(ch))
|
|
if chkey not in timer_ch_periph:
|
|
continue
|
|
f.write("#define %-30s %s\n" %
|
|
(chibios_dma_define_name(chkey)+'CHAN',
|
|
chan.replace('_UP', '_CH{}'.format(ch))))
|
|
break
|
|
|
|
f.write("\n// Mask of DMA streams which are shared\n")
|
|
if len(shared_set) == 0:
|
|
f.write("#define SHARED_DMA_MASK 0\n")
|
|
else:
|
|
f.write("#define SHARED_DMA_MASK (%s)\n" % '|'.join(list(shared_set)))
|
|
|
|
# now generate UARTDriver.cpp DMA config lines
|
|
f.write("\n\n// generated UART DMA configuration lines\n")
|
|
for u in range(1, 9):
|
|
key = None
|
|
if 'USART%u_TX' % u in peripheral_list:
|
|
key = 'USART%u' % u
|
|
if 'UART%u_TX' % u in peripheral_list:
|
|
key = 'UART%u' % u
|
|
if 'USART%u_RX' % u in peripheral_list:
|
|
key = 'USART%u' % u
|
|
if 'UART%u_RX' % u in peripheral_list:
|
|
key = 'UART%u' % u
|
|
if key is None:
|
|
continue
|
|
if have_DMAMUX:
|
|
# use DMAMUX ID as channel number
|
|
dma_rx_chn = dmamux_channel(key + "_RX")
|
|
dma_tx_chn = dmamux_channel(key + "_TX")
|
|
else:
|
|
dma_rx_chn = "STM32_UART_%s_RX_%s_CHAN" % (key, dma_name(key))
|
|
dma_tx_chn = "STM32_UART_%s_TX_%s_CHAN" % (key, dma_name(key))
|
|
|
|
f.write("#define STM32_%s_RX_DMA_CONFIG " % key)
|
|
if key + "_RX" in curr_dict:
|
|
f.write(
|
|
"true, STM32_UART_%s_RX_%s_STREAM, %s\n" % (key, dma_name(key), dma_rx_chn))
|
|
else:
|
|
f.write("false, 0, 0\n")
|
|
f.write("#define STM32_%s_TX_DMA_CONFIG " % key)
|
|
if key + "_TX" in curr_dict:
|
|
f.write(
|
|
"true, STM32_UART_%s_TX_%s_STREAM, %s\n" % (key, dma_name(key), dma_tx_chn))
|
|
else:
|
|
f.write("false, 0, 0\n")
|
|
|
|
# now generate SPI DMA streams lines
|
|
f.write("\n\n// generated SPI DMA configuration lines\n")
|
|
for u in range(1, 9):
|
|
if 'SPI%u_TX' % u in peripheral_list and 'SPI%u_RX' % u in peripheral_list:
|
|
key = 'SPI%u' % u
|
|
else:
|
|
continue
|
|
if dma_name(key) == 'BDMA':
|
|
# we use SHARED_DMA_NONE for SPI6 on H7 as we don't need to lock the stream
|
|
# as it is never shared
|
|
f.write('#define STM32_SPI_%s_DMA_STREAMS SHARED_DMA_NONE, SHARED_DMA_NONE\n' % key)
|
|
else:
|
|
f.write('#define STM32_SPI_%s_DMA_STREAMS STM32_SPI_%s_TX_%s_STREAM, STM32_SPI_%s_RX_%s_STREAM\n' % (
|
|
key, key, dma_name(key), key, dma_name(key)))
|
|
return unassigned, ordered_timers
|
|
|
|
|
|
if __name__ == '__main__':
|
|
import optparse
|
|
|
|
parser = optparse.OptionParser("dma_resolver.py")
|
|
parser.add_option("-M", "--mcu", default=None, help='MCU type')
|
|
parser.add_option(
|
|
"-D", "--debug", action='store_true', help='enable debug')
|
|
parser.add_option(
|
|
"-P",
|
|
"--peripherals",
|
|
default=None,
|
|
help='peripheral list (comma separated)')
|
|
|
|
opts, args = parser.parse_args()
|
|
|
|
if opts.peripherals is None:
|
|
print("Please provide a peripheral list with -P")
|
|
sys.exit(1)
|
|
|
|
if opts.mcu is None:
|
|
print("Please provide a MCU type with -<")
|
|
sys.exit(1)
|
|
|
|
debug = opts.debug
|
|
|
|
plist = opts.peripherals.split(',')
|
|
mcu_type = opts.mcu
|
|
|
|
f = open("dma.h", "w")
|
|
write_dma_header(f, plist, mcu_type)
|
|
|