mirror of https://github.com/ArduPilot/ardupilot
409 lines
12 KiB
C++
409 lines
12 KiB
C++
/*
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* Copyright (C) 2015-2016 Intel Corporation. All rights reserved.
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*
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* This file is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <inttypes.h>
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#include "AP_HAL_Namespace.h"
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#include "utility/functor.h"
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/*
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* This is an interface abstracting I2C and SPI devices
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*/
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class AP_HAL::Device {
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public:
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enum BusType {
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BUS_TYPE_UNKNOWN = 0,
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BUS_TYPE_I2C = 1,
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BUS_TYPE_SPI = 2,
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BUS_TYPE_UAVCAN = 3,
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BUS_TYPE_SITL = 4,
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BUS_TYPE_MSP = 5,
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};
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enum Speed {
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SPEED_HIGH,
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SPEED_LOW,
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};
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FUNCTOR_TYPEDEF(PeriodicCb, void);
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typedef void* PeriodicHandle;
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FUNCTOR_TYPEDEF(BankSelectCb, bool, uint8_t);
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Device(enum BusType type)
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{
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_bus_id.devid_s.bus_type = type;
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}
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// return bus type
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enum BusType bus_type(void) const {
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return _bus_id.devid_s.bus_type;
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}
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// return bus number
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uint8_t bus_num(void) const {
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return _bus_id.devid_s.bus;
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}
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// return 24 bit bus identifier
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uint32_t get_bus_id(void) const {
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return _bus_id.devid;
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}
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// return address on bus
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uint8_t get_bus_address(void) const {
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return _bus_id.devid_s.address;
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}
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// set device type within a device class (eg. AP_COMPASS_TYPE_LSM303D)
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void set_device_type(uint8_t devtype) {
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_bus_id.devid_s.devtype = devtype;
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}
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virtual ~Device() {
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if (_checked.regs != nullptr) {
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delete[] _checked.regs;
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}
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}
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/*
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* Change device address. Note that this is the 7 bit address, it
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* does not include the bit for read/write. Only works on I2C
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*/
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virtual void set_address(uint8_t address) {};
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/*
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* Set the speed of future transfers. Depending on the bus the speed may
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* be shared for all devices on the same bus.
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*
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* Return: true if speed was successfully set or platform doesn't implement
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* it; false otherwise.
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*/
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virtual bool set_speed(Speed speed) = 0;
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/*
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* Core transfer function. This does a single bus transaction which
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* sends send_len bytes and receives recv_len bytes back from the slave.
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*
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* Return: true on a successful transfer, false on failure.
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*/
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virtual bool transfer(const uint8_t *send, uint32_t send_len,
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uint8_t *recv, uint32_t recv_len) = 0;
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/**
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* Wrapper function over #transfer() to read recv_len registers, starting
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* by first_reg, into the array pointed by recv. The read flag passed to
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* #set_read_flag(uint8_t) is ORed with first_reg before performing the
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* transfer.
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*
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* Return: true on a successful transfer, false on failure.
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*/
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bool read_registers(uint8_t first_reg, uint8_t *recv, uint32_t recv_len)
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{
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first_reg |= _read_flag;
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return transfer(&first_reg, 1, recv, recv_len);
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}
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/**
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* Wrapper function over #transfer() to write a byte to the register reg.
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* The transfer is done by sending reg and val in that order.
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*
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* Return: true on a successful transfer, false on failure.
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*/
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bool write_register(uint8_t reg, uint8_t val, bool checked=false)
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{
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uint8_t buf[2] = { reg, val };
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if (checked) {
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set_checked_register(reg, val);
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}
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return transfer(buf, sizeof(buf), nullptr, 0);
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}
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/**
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* Wrapper function over #transfer() to call bank selection callback
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* and then invoke the transfer call
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*
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* Return: true on a successful transfer, false on failure.
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*/
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bool transfer_bank(uint8_t bank, const uint8_t *send, uint32_t send_len,
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uint8_t *recv, uint32_t recv_len) {
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if (_bank_select) {
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if (!_bank_select(bank)) {
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return false;
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}
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}
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return transfer(send, send_len, recv, recv_len);
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}
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/**
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* Wrapper function over #transfer_bank() to read recv_len registers, starting
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* by first_reg, into the array pointed by recv. The read flag passed to
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* #set_read_flag(uint8_t) is ORed with first_reg before performing the
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* transfer.
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*
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* Return: true on a successful transfer, false on failure.
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*/
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bool read_bank_registers(uint8_t bank, uint8_t first_reg, uint8_t *recv, uint32_t recv_len)
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{
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first_reg |= _read_flag;
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return transfer_bank(bank, &first_reg, 1, recv, recv_len);
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}
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/**
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* Wrapper function over #transfer_bank() to write a byte to the register reg.
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* The transfer is done by sending reg and val in that order.
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*
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* Return: true on a successful transfer, false on failure.
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*/
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bool write_bank_register(uint8_t bank, uint8_t reg, uint8_t val, bool checked=false)
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{
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uint8_t buf[2] = { reg, val };
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if (checked) {
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set_checked_register(bank, reg, val);
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}
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return transfer_bank(bank, buf, sizeof(buf), nullptr, 0);
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}
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/**
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* set a value for a checked register in a bank
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*/
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void set_checked_register(uint8_t bank, uint8_t reg, uint8_t val);
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/**
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* set a value for a checked register
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*/
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void set_checked_register(uint8_t reg, uint8_t val);
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/**
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* setup for register value checking. Frequency is how often to check registers. If set to 10 then
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* every 10th call to check_next_register will check a register
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*/
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bool setup_checked_registers(uint8_t num_regs, uint8_t frequency=10);
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/**
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* check next register value for correctness. Return false if value is incorrect
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* or register checking has not been setup
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*/
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bool check_next_register(void);
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/**
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* Wrapper function over #transfer() to read a sequence of bytes from
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* device. No value is written, differently from the #read_registers()
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* method and hence doesn't include the read flag set by #set_read_flag()
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*/
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bool read(uint8_t *recv, uint32_t recv_len)
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{
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return transfer(nullptr, 0, recv, recv_len);
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}
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/*
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* Get the semaphore for the bus this device is in. This is intended for
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* drivers to use during initialization phase only.
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*/
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virtual AP_HAL::Semaphore *get_semaphore() = 0;
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/*
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* Register a periodic callback for this bus. All callbacks on the
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* same bus are made from the same thread with lock already taken. In
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* other words, the callback is not executed on the main thread (or the
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* thread which registered the callback), but in a separate per-bus
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* thread.
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*
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* After registering the periodic callback, the other functions should not
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* be used anymore from other contexts. If it really needs to be done, the
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* lock must be taken.
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*
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* Return: A handle for this periodic callback. To cancel the callback
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* call #unregister_callback() or return false on the callback.
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*/
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virtual PeriodicHandle register_periodic_callback(uint32_t period_usec, PeriodicCb) = 0;
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/*
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* Adjust the time for the periodic callback registered with
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* #register_periodic_callback. Note that the time will be re-calculated
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* from the moment this call is made and expire after @period_usec.
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*
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* Return: true if periodic callback was successfully adjusted, false otherwise.
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*/
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virtual bool adjust_periodic_callback(PeriodicHandle h, uint32_t period_usec) = 0;
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/*
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* Cancel a periodic callback on this bus.
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*
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* Return: true if callback was successfully unregistered, false
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* otherwise.
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*/
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virtual bool unregister_callback(PeriodicHandle h) { return false; }
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/*
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* Sets a bank_select callback to be used for bank selection during register check
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*/
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virtual void setup_bankselect_callback(BankSelectCb bank_select) {
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_bank_select = bank_select;
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}
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/*
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* Sets a bank_select callback to be used for bank selection during register check
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*/
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virtual void deregister_bankselect_callback() {
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_bank_select = nullptr;
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}
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/*
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allows to set callback that will be called after DMA transfer complete.
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if this callback is set then any read/write operation will return directly after transfer setup and
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bus semaphore must not be released until register_completion_callback(0) called from callback itself
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*/
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virtual void register_completion_callback(AP_HAL::MemberProc proc) {}
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virtual void register_completion_callback(AP_HAL::Proc proc) {}
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/*
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* support for direct control of SPI chip select. Needed for
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* devices with unusual SPI transfer patterns that include
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* specific delays
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*/
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virtual bool set_chip_select(bool set) { return false; }
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/**
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* Some devices connected on the I2C or SPI bus require a bit to be set on
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* the register address in order to perform a read operation. This sets a
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* flag to be used by #read_registers(). The flag's default value is zero.
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*/
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void set_read_flag(uint8_t flag)
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{
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_read_flag = flag;
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}
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/**
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* make a bus id given bus type, bus number, bus address and
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* device type This is for use by devices that do not use one of
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* the standard HAL Device types, such as UAVCAN devices
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*/
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static uint32_t make_bus_id(enum BusType bus_type, uint8_t bus, uint8_t address, uint8_t devtype) {
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union DeviceId d {};
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d.devid_s.bus_type = bus_type;
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d.devid_s.bus = bus;
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d.devid_s.address = address;
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d.devid_s.devtype = devtype;
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return d.devid;
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}
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/**
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* return a new bus ID for the same bus connection but a new device type.
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* This is used for auxillary bus connections
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*/
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static uint32_t change_bus_id(uint32_t old_id, uint8_t devtype) {
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union DeviceId d;
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d.devid = old_id;
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d.devid_s.devtype = devtype;
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return d.devid;
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}
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/**
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* return bus ID with a new devtype
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*/
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uint32_t get_bus_id_devtype(uint8_t devtype) {
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return change_bus_id(get_bus_id(), devtype);
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}
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/**
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* get bus type
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*/
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static enum BusType devid_get_bus_type(uint32_t dev_id) {
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union DeviceId d;
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d.devid = dev_id;
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return d.devid_s.bus_type;
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}
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static uint8_t devid_get_bus(uint32_t dev_id) {
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union DeviceId d;
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d.devid = dev_id;
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return d.devid_s.bus;
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}
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static uint8_t devid_get_address(uint32_t dev_id) {
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union DeviceId d;
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d.devid = dev_id;
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return d.devid_s.address;
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}
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static uint8_t devid_get_devtype(uint32_t dev_id) {
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union DeviceId d;
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d.devid = dev_id;
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return d.devid_s.devtype;
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}
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/* set number of retries on transfers */
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virtual void set_retries(uint8_t retries) {};
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protected:
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uint8_t _read_flag = 0;
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/*
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broken out device elements. The bitfields are used to keep
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the overall value small enough to fit in a float accurately,
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which makes it possible to transport over the MAVLink
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parameter protocol without loss of information.
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*/
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struct DeviceStructure {
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enum BusType bus_type : 3;
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uint8_t bus: 5; // which instance of the bus type
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uint8_t address; // address on the bus (eg. I2C address)
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uint8_t devtype; // device class specific device type
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};
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union DeviceId {
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struct DeviceStructure devid_s;
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uint32_t devid;
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};
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union DeviceId _bus_id;
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// set device address (eg. i2c bus address or spi CS)
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void set_device_address(uint8_t address) {
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_bus_id.devid_s.address = address;
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}
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// set device bus number
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void set_device_bus(uint8_t bus) {
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_bus_id.devid_s.bus = bus;
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}
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private:
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BankSelectCb _bank_select;
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// checked registers
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struct checkreg {
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uint8_t bank;
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uint8_t regnum;
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uint8_t value;
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};
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struct {
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uint8_t n_allocated;
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uint8_t n_set;
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uint8_t next;
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uint8_t frequency;
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uint8_t counter;
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struct checkreg *regs;
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} _checked;
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};
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