Andrew Tridgell
|
312597ac20
|
HAL_ChibiOS: fixed default batt2 pins for fmuv5
|
2019-02-26 16:18:26 +11:00 |
Andrew Tridgell
|
34a7812416
|
HAL_ChibiOS: use -O3 on boards with 2M flash
|
2019-02-26 16:18:26 +11:00 |
Andrew Tridgell
|
18e97bd895
|
HAL_ChibiOS: fixed CAN on Pixhawk4 and PH4-mini
the silent pins floating disabled CAN
|
2019-01-23 13:24:13 +11:00 |
Andrew Tridgell
|
17d62be9bb
|
HAL_ChibiOS: disable USART6_TX on fmuv5
this prevents it acting as a pullup on SBUS input for Pixhawk4. Thanks
to David Sidrane for the suggestion.
|
2019-01-18 10:24:27 +11:00 |
Andrew Tridgell
|
4886ccd8ba
|
HAL_ChibiOS: fixed safety switch and LEDs on PH4-mini
fixes #10127
|
2018-12-29 15:50:00 +11:00 |
auturgy
|
575d03796c
|
AP_HAL_ChibiOS: fix typo in fmuv5 hwdef [NFC]
header comment fixed from fmuv3 to fmuv5
|
2018-11-09 18:58:27 +09:00 |
Lucas De Marchi
|
20778f73f1
|
AP_HAL_ChibiOS: define HAL_HAVE_SAFETY_SWITCH accordingly
|
2018-08-02 13:15:02 -07:00 |
Andrew Tridgell
|
95aaa01014
|
HAL_ChibiOS: override COMPASS_AUTO_ROT on several boards
|
2018-07-28 18:05:12 +10:00 |
Andrew Tridgell
|
63a0a4979c
|
HAL_ChibiOS: delay peripheral power on for fmuv5
this should prevent SiK radios staying in the bootloader
|
2018-07-13 07:34:30 +10:00 |
Andrew Tridgell
|
b647dde28f
|
HAL_ChibiOS: changed which I2C bus is internal on fmuv5
match PH4 arrangement
|
2018-07-10 18:29:14 +10:00 |
Andrew Tridgell
|
63a9b903ba
|
HAL_ChibiOS: added fallback to microSD for param storage
useful for boards without flash sectors setup in bootloader for
storage, but can use microSD
|
2018-07-10 15:41:44 +10:00 |
Andrew Tridgell
|
dd059b89f3
|
HAL_ChibiOS: added uartG for fmuv4 and fmuv5
|
2018-06-29 08:17:38 +10:00 |
Andrew Tridgell
|
54dc67e2a9
|
HAL_ChibiOS: default bootloader product string to XX-BL
|
2018-06-28 11:35:13 +10:00 |
Andrew Tridgell
|
d183efa720
|
HAL_ChibiOS: fixed USB string of fmuv5 bootloader
|
2018-06-28 11:35:13 +10:00 |
Andrew Tridgell
|
f71d2a7417
|
HAL_ChibiOS: support bootloaders with no uarts
|
2018-06-25 21:22:31 +10:00 |
Andrew Tridgell
|
d88b710ea9
|
HAL_ChibiOS: added more bootloader hwdef-bl.dat files
|
2018-06-22 08:00:31 +10:00 |
Andrew Tridgell
|
1c054f0e4a
|
HAL_ChibiOS: fixed clock line on fmuv5 I2C4
there was a typo in the datasheet
|
2018-06-21 13:08:20 +10:00 |
Andrew Tridgell
|
10ca1e78e8
|
HAL_ChibiOS: switched to Mode3 on SPI1
this is now working correctly
|
2018-06-13 20:05:26 +10:00 |
Andrew Tridgell
|
9d248456e4
|
HAL_ChibiOS: re-enable I2C4 DMA for F765
now we have fixed the error from the datasheet we can do DMA
|
2018-06-13 20:05:26 +10:00 |
Andrew Tridgell
|
e068106669
|
HAL_ChibiOS: support I2C devices on STM32F7 without DMA
this allows us to support I2C4 on fmuv5
|
2018-06-13 20:05:26 +10:00 |
Andrew Tridgell
|
ab946b5d76
|
HAL_ChibiOS: disable debug code for FMUv5
|
2018-06-08 09:56:41 +10:00 |
Andrew Tridgell
|
3a7c1b4d42
|
HAL_ChibiOS: switch BMI055 to mode0 on fmuv5
|
2018-06-08 09:56:41 +10:00 |
Andrew Tridgell
|
3be9077ba9
|
HAL_ChibiOS: added FMUv5 FMU capture pins
|
2018-06-06 15:01:38 +10:00 |
Andrew Tridgell
|
63087b6425
|
HAL_ChibiOS: enable fmu out 7 and 8 for fmuv5
these are exposed on the Pixhawk4
|
2018-06-06 15:01:38 +10:00 |
Andrew Tridgell
|
c273b23940
|
HAL_ChibiOS: moved MCU config to python database
this moves the key MCU config variables related to memory to the
python MCU database, allowing the hwdef.dat to be considerably simpler
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
a1c97d0585
|
HAL_ChibiOS: disable paranoid checks for fmuv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
2493cdbcb6
|
HAL_ChibiOS: switch to new bouncebuffer system
this removes the dma_flush and dma_invalidate methods and uses a
common bouncebuffer system for all CPU types. This enables microSD
support on STM32F7
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
56ce3f057d
|
HAL_ChibiOS: added DRDY and SDMMC pins for FMUv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
eec4a12cc2
|
HAL_ChibiOS: switched to using DTCM memory for DMA
this uses SRAM1 and SRAM2 for main memory, which enables the use of the
data cache for faster operation, and using DTCM for all DMA operations.
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
010cd71ab6
|
HAL_ChibiOS: enable CAN on FMUv5
and fixed voltage scaling defaults
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
77d95f6744
|
HAL_ChibiOS: fmuv5 tweaks
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
edb831653f
|
HAL_ChibiOS: added dma_flush and dma_invalidate operations
these are needed to manage the data cache on the STM32F7
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
7449e15313
|
HAL_ChibiOS: disable flash storage option on FMUv5
F7 flash driver not working yet
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
2d8748ddce
|
HAL_ChibiOS: enable ADCs and buzzer for fmuv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
6aab9232ef
|
HAL_ChibiOS: enable aux pwm channels on FMUv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
db9bf19e46
|
HAL_ChibiOS: enable i2c for FMUv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
77bb69fa2e
|
HAL_ChibiOS: enabled UARTs for FMUv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
ac44189ab2
|
HAL_ChibiOS: setup two IMUs for FMUv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
01f5d1a17c
|
HAL_ChibiOS: first IMU working
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
876899c48d
|
HAL_ChibiOS: baro and FRAM working for fmuv5
|
2018-06-06 07:15:41 +10:00 |
Andrew Tridgell
|
7c09a1781b
|
HAL_ChibiOS: started on fmuv5
|
2018-06-06 07:15:41 +10:00 |