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7 Commits

Author SHA1 Message Date
Andrew Tridgell 45a6df0cee HAL_ChibiOS: drop mRoControlZeroF7 DPS310 clock to 5MHz 2020-02-05 10:13:53 +11:00
Phillip Kocmoud 0fffc77dae HAL_ChibiOS: update mRoControlZeroF7 I2C mask 2019-12-09 12:58:52 +11:00
Andrew Tridgell 2962211ea0 HAL_ChibiOS: changed optimisation of higher end boards to -O2 
-O3 does not seem to be a win, and takes up a lot more flash
 2019-10-01 08:33:13 +10:00
Andrew Tridgell 98f578394f HAL_ChibiOS: default OTG2 protocol to mavlink2 on most boards 
For boards that haven't yet had a driver update in MissionPlanner to
cope with the 2nd OTG interface this change makes both interfaces work
as MAVLink

This also fixes an issue with connecting under a windows VM within
vmware
 2019-07-26 21:58:57 +10:00
Andrew Tridgell 1919268801 HAL_ChibiOS: added OTG2 on all F7 and H7 boards with CAN 
allows for SLCAN on 2nd port
 2019-07-12 17:01:21 +10:00
Andrew Tridgell ceb9c3b83e HAL_ChibiOS: convert mRoControlZeroF7 to new sensor config 2019-05-30 15:39:57 +10:00
Phillip Kocmoud 9709401595 HAL_ChibiOS: added hwdef for mRoControlZeroF7 2019-05-10 15:05:42 +10:00