3 Commits

Author	SHA1	Message	Date
Andrew Tridgell	c9031f1d36	SITL: implement cli()/sei() properly for desktop build ... this disables simulated hardware interrupts during critical sections	2012-03-02 15:48:27 +11:00
Andrew Tridgell	6f44415b19	desktop: make ISRs normal C++ functions ... this will make it possible to add an abstract register simulation class that allows us to intercept device IO	2011-10-11 17:49:40 +11:00
Andrew Tridgell	4109374959	first rough build for desktop CPUs ... this allows ArduPlane to build and startup on 'desktop' systems (eg. a Linux box). Very rough for now, and only for HIL so far	2011-10-09 22:16:13 +11:00