Commit Graph

3 Commits

Author SHA1 Message Date
Andrew Tridgell 2bed1dcfd5 desktop: first version of register level SITL support
this adds register level emulation of the ADS7844 and the RC
input/output hardware on the APM1, allowing for SITL testing without
enabling HIL in the code
2011-11-25 20:00:18 -08:00
Andrew Tridgell 6f44415b19 desktop: make ISRs normal C++ functions
this will make it possible to add an abstract register simulation
class that allows us to intercept device IO
2011-10-11 17:49:40 +11:00
Andrew Tridgell 4109374959 first rough build for desktop CPUs
this allows ArduPlane to build and startup on 'desktop' systems (eg. a
Linux box). Very rough for now, and only for HIL so far
2011-10-09 22:16:13 +11:00