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6 Commits

Author SHA1 Message Date
Andrew Tridgell 70ff3871e0 HAL_ChibiOS: fixed RC in on CH1 of timer 2018-02-07 20:33:45 +11:00
Andrew Tridgell ab748034a2 HAL_ChibiOS: removed RC inversion logic 
not needed any more
 2018-01-20 17:40:07 +11:00
bugobliterator 02c7513f83 HAL_ChibiOS: add invert method and fix width measurement 2018-01-20 17:40:07 +11:00
Andrew Tridgell ccb85c2707 HAL_ChibiOS: fixed fmuv3 build with no ICU 2018-01-20 17:40:07 +11:00
Andrew Tridgell e2c8fe27ef HAL_ChibiOS: fixed memory handling in SoftSigReader 2018-01-20 17:40:07 +11:00
bugobliterator 6be4c710c3 HAL_ChibiOS: add Software Signal reader using timer and DMA 2018-01-20 17:40:07 +11:00