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Commit Graph

13 Commits

Author SHA1 Message Date
Andrew Tridgell
6e6a47c0fd HAL_ChibiOS: added a DMA reserve heap 
this ensures we keep some DMA-capable memory aside for when it is
needed
 2018-08-06 16:01:36 +10:00
Andrew Tridgell
369ac5edd0 HAL_ChibiOS: save more space in the bootloader 2018-06-25 21:22:31 +10:00
Andrew Tridgell
c12d14d7a4 HAL_ChibiOS: check for ChibiOS features 2018-06-22 08:00:31 +10:00
Andrew Tridgell
c273b23940 HAL_ChibiOS: moved MCU config to python database 
this moves the key MCU config variables related to memory to the
python MCU database, allowing the hwdef.dat to be considerably simpler
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
2493cdbcb6 HAL_ChibiOS: switch to new bouncebuffer system 
this removes the dma_flush and dma_invalidate methods and uses a
common bouncebuffer system for all CPU types. This enables microSD
support on STM32F7
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
eec4a12cc2 HAL_ChibiOS: switched to using DTCM memory for DMA 
this uses SRAM1 and SRAM2 for main memory, which enables the use of the
data cache for faster operation, and using DTCM for all DMA operations.
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
2087354939 HAL_ChibiOS: align buffers to STM32F7 cache lines 
this allows for DMA flush and invalidate operations to work on all
dynamically allocated memory
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
29add8a880 HAL_ChibiOS: fixed build without FATFS enabled 2018-02-07 20:33:45 +11:00
Andrew Tridgell
6e4ef32628 HAL_ChibiOS: moved to generated loader script 2018-01-15 11:46:02 +11:00
Andrew Tridgell
f135e73e04 HAL_ChibiOS: F412 doesn't have CCM ram 2018-01-15 11:46:02 +11:00
bugobliterator
5feef04f5f HAL_ChibiOS: add support for CCM memory 
this uses DMA bounce buffers for bus transfers, and falls back to CCM
ram in allocations if the type is unspecified
 2018-01-15 11:46:02 +11:00
Andrew Tridgell
86fbdcd060 HAL_ChibiOS: ensure malloc returns zeroed memory 2018-01-15 11:46:02 +11:00
Andrew Tridgell
8b6bab7b17 HAL_Chibios: added ChibiOS HAL 
this is based on initial work by Sid, reset here for easier merging
 2018-01-15 11:46:02 +11:00