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32,664 Commits 71 Branches 510 Tags 769 MiB
1c054f0e4a
Commit Graph

417 Commits

Author SHA1 Message Date
Andrew Tridgell
1c054f0e4a HAL_ChibiOS: fixed clock line on fmuv5 I2C4 
there was a typo in the datasheet
 2018-06-21 13:08:20 +10:00
Andrew Tridgell
a8f99882ba HAL_ChibiOS: allow FrSky_INV to be controlled as GPIO 
this allows control via relay settings
 2018-06-21 07:40:50 +10:00
Andrew Tridgell
e3b68876a9 HAL_ChibiOS: fixed tx_len on tx DMA timeout 2018-06-19 09:08:45 +10:00
Andrew Tridgell
8431a677d9 HAL_ChibiOS: added a timeout to DMA UART TX 
this prevents a shared DMA channel being held for a long time if a CTS
pin is held either by not being connected or by a radio
 2018-06-19 09:08:45 +10:00
Hyungsub
8ae2729022 AP_HAL_ChibiOS: fix memory leaks 
Fixes #8644
 2018-06-18 10:30:56 +01:00
Andrew Tridgell
1c4bf3d804 HAL_ChibiOS: fixed build warning 2018-06-15 11:26:40 +10:00
Lucas De Marchi
46213eb97e chibios_hwdef: fix wrong uart index 
calling uart_list.index() will find the first element with that name,
which is not really what we want when we have multiple EMPTY uarts.
 2018-06-15 08:21:40 +10:00
Andrew Tridgell
00d919018b HAL_ChibiOS: added RTC clock implementation 2018-06-15 08:01:22 +10:00
Andrew Tridgell
10ca1e78e8 HAL_ChibiOS: switched to Mode3 on SPI1 
this is now working correctly
 2018-06-13 20:05:26 +10:00
Andrew Tridgell
9d248456e4 HAL_ChibiOS: re-enable I2C4 DMA for F765 
now we have fixed the error from the datasheet we can do DMA
 2018-06-13 20:05:26 +10:00
Andrew Tridgell
ad3eca4e6b HAL_ChibiOS: fixed I2C4 DMA streams 
There is an error in the datasheet. See
https://community.st.com/thread/50484-documentation-error-on-dma-channels-for-i2c4-on-stm32f7
 2018-06-13 20:05:26 +10:00
Andrew Tridgell
62e8fbb9d3 HAL_ChibiOS: fixed OMNIBUSF7V2 hwdef.dat 2018-06-13 20:05:26 +10:00
Andrew Tridgell
e068106669 HAL_ChibiOS: support I2C devices on STM32F7 without DMA 
this allows us to support I2C4 on fmuv5
 2018-06-13 20:05:26 +10:00
Alexander Malishev
289b93c3d0 HAL_ChibiOS: added parse_timer to chibios_hwdef.dat 2018-06-11 18:32:17 +10:00
Eugene Shamaev
2055f264e5 AP_HAL_ChibiOS: helper func 2018-06-09 22:46:48 -07:00
Andrew Tridgell
ab946b5d76 HAL_ChibiOS: disable debug code for FMUv5 2018-06-08 09:56:41 +10:00
Philip
2424e38ed2 HAL_ChibiOS: Update cube-orange hwdef.dat for USB IDs 2018-06-08 09:56:41 +10:00
Andrew Tridgell
058e83c180 HAL_ChibiOS: switched cube-orange SPI1 devices to Mode0 2018-06-08 09:56:41 +10:00
Andrew Tridgell
2df0a71a4b HAL_ChibiOS: fixed flash load address in hwdef.h 2018-06-08 09:56:41 +10:00
Andrew Tridgell
3a7c1b4d42 HAL_ChibiOS: switch BMI055 to mode0 on fmuv5 2018-06-08 09:56:41 +10:00
Andrew Tridgell
3be9077ba9 HAL_ChibiOS: added FMUv5 FMU capture pins 2018-06-06 15:01:38 +10:00
Andrew Tridgell
c05086430d HAL_ChibiOS: fixed hwdef.h generation for PWM on tim12 2018-06-06 15:01:38 +10:00
Andrew Tridgell
63087b6425 HAL_ChibiOS: enable fmu out 7 and 8 for fmuv5 
these are exposed on the Pixhawk4
 2018-06-06 15:01:38 +10:00
Alexander Malishev
eac5d13f1c HAL_ChibiOS: use 2 channels in SoftSigReaderInt.cpp 2018-06-06 08:23:51 +10:00
Alexander Malishev
fd45b3a69b HAL_ChibiOS: slightly increase EICU interrupt priority 2018-06-06 08:23:51 +10:00
Alexander Malishev
73d33356ad HAL_ChibiOS: detect overcapture in SoftSigReaderInt.cpp 2018-06-06 08:23:51 +10:00
Andrew Tridgell
7a1f87eb52 HAL_ChibiOS: added cube-orange hwdef 2018-06-06 08:13:38 +10:00
Michael du Breuil
1123023a6f AP_HAL_ChibiOS: Wrap process registration with a semaphore 2018-06-06 07:16:58 +10:00
Michael du Breuil
a832bdfd04 AP_HAL_ChibiOS: fix race condition on analog reading 2018-06-06 07:16:58 +10:00
Michael du Breuil
4a9fe1745f AP_ChibiOS: Remove timer process suspension interface 2018-06-06 07:16:58 +10:00
Andrew Tridgell
1ed6a9d34b HAL_ChibiOS: added MCU tables for STM32F777 2018-06-06 07:15:41 +10:00
Andrew Tridgell
d1caa86e12 HAL_ChibiOS: adjust DMA priorities for fmuv3 2018-06-06 07:15:41 +10:00
Andrew Tridgell
c273b23940 HAL_ChibiOS: moved MCU config to python database 
this moves the key MCU config variables related to memory to the
python MCU database, allowing the hwdef.dat to be considerably simpler
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
f390e35c99 HAL_ChibiOS: use port_disable in reboot 
this provides a more reliable way to stop all interrupts
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
a1c97d0585 HAL_ChibiOS: disable paranoid checks for fmuv5 2018-06-06 07:15:41 +10:00
Andrew Tridgell
a945c97ec6 HAL_ChibiOS: fixed 3-way DMA sharing bug 
when we have 3 way contention across two DMA streams we could get the
dma_deallocate function called in an object from two places at
once. This adds a mutex that prevents that scenario
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
0e09dc75c0 HAL_ChibiOS: flush all memory on chSysHalt() 
this makes debugging a lot easier, as gdb can see the values in dcache
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
2493cdbcb6 HAL_ChibiOS: switch to new bouncebuffer system 
this removes the dma_flush and dma_invalidate methods and uses a
common bouncebuffer system for all CPU types. This enables microSD
support on STM32F7
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
0b1e26a470 HAL_ChibiOS: added bouncebuffer system 
this makes our bouncebuffers available for ChibiOS system
drivers. This is needed for SDMMCv1 on STM32F7
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
56ce3f057d HAL_ChibiOS: added DRDY and SDMMC pins for FMUv5 2018-06-06 07:15:41 +10:00
Andrew Tridgell
018c9ad40b HAL_ChibiOS: fixed build warnings 2018-06-06 07:15:41 +10:00
Andrew Tridgell
f25b95f287 HAL_ChibiOS: fixed array length in ADC debug code 2018-06-06 07:15:41 +10:00
Andrew Tridgell
fef1b0ffc6 HAL_ChibiOS: fixed I2C flush/invalidate calls 2018-06-06 07:15:41 +10:00
Andrew Tridgell
0fade4eb9e HAL_ChibiOS: make sure the UART bounce buffers are DMA safe 2018-06-06 07:15:41 +10:00
Andrew Tridgell
eec4a12cc2 HAL_ChibiOS: switched to using DTCM memory for DMA 
this uses SRAM1 and SRAM2 for main memory, which enables the use of the
data cache for faster operation, and using DTCM for all DMA operations.
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
8b1db792ee HAL_ChibiOS: ensure ADC memory is aligned for DMA access 2018-06-06 07:15:41 +10:00
Andrew Tridgell
bb2e7a189f HAL_ChibiOS: added a debug function for showing stack free 
this can be enabled when needed to investigate stack space remaining
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
010cd71ab6 HAL_ChibiOS: enable CAN on FMUv5 
and fixed voltage scaling defaults
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
2087354939 HAL_ChibiOS: align buffers to STM32F7 cache lines 
this allows for DMA flush and invalidate operations to work on all
dynamically allocated memory
 2018-06-06 07:15:41 +10:00
Andrew Tridgell
762e4f9915 HAL_ChibiOS: fixed dma priorities for fmuv5 2018-06-06 07:15:41 +10:00