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0534406f6d
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2 Commits

Author SHA1 Message Date
Andrew Tridgell
0534406f6d SITL: added SREG declaration 2012-11-19 08:42:36 +11:00
Andrew Tridgell
4109374959 first rough build for desktop CPUs 
this allows ArduPlane to build and startup on 'desktop' systems (eg. a
Linux box). Very rough for now, and only for HIL so far
 2011-10-09 22:16:13 +11:00