f4by chibios new style dma table build fix

This commit is contained in:
Alexey Kozin 2018-04-15 10:52:53 +03:00 committed by Andrew Tridgell
parent 4871bbf403
commit f87cc4e172
2 changed files with 116 additions and 85 deletions

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@ -1,92 +1,93 @@
#!/usr/bin/env python
'''
for STM32F407
STM32F407X vs STM32F42XX is not supported:
SAI1 SPI4 SPI5 SPI6
http://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf
pages 307-308 dma table
these tables are generated from the STM32 datasheets for the
STM32F40x
'''
# additional build information for ChibiOS
build = {
"CHIBIOS_STARTUP_MK" : "os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk",
"CHIBIOS_PLATFORM_MK" : "os/hal/ports/STM32/STM32F4xx/platform.mk"
}
DMA_Map = {
# format is [DMA_TABLE, StreamNum]
# extracted from tabula-STM324x7-306.csv and tabula-STM324x7-307.csv
"ADC1" : [(2,0),(2,4)],
"ADC2" : [(2,2),(2,3)],
"ADC3" : [(2,0),(2,1)],
"CRYP_IN" : [(2,6)],
"CRYP_OUT" : [(2,5)],
"DAC1" : [(1,5)],
"DAC2" : [(1,6)],
"DCMI" : [(2,1),(2,7)],
"HASH_IN" : [(2,7)],
"I2C1_RX" : [(1,0),(1,5)],
"I2C1_TX" : [(1,6),(1,7)],
"I2C2_RX" : [(1,2),(1,3)],
"I2C2_TX" : [(1,7)],
"I2C3_RX" : [(1,2)],
"I2C3_TX" : [(1,4)],
"I2S2_EXT_RX" : [(1,3)],
"I2S2_EXT_TX" : [(1,4)],
"I2S3_EXT_RX" : [(1,2),(1,0)],
"I2S3_EXT_TX" : [(1,5)],
"SDIO" : [(2,3),(2,6)],
"SPI1_RX" : [(2,0),(2,2)],
"SPI1_TX" : [(2,3),(2,5)],
"SPI2_RX" : [(1,3)],
"SPI2_TX" : [(1,4)],
"SPI3_RX" : [(1,0),(1,2)],
"SPI3_TX" : [(1,5),(1,7)],
"TIM1_CH1" : [(2,6),(2,1),(2,3)],
"TIM1_CH2" : [(2,6),(2,2)],
"TIM1_CH3" : [(2,6),(2,6)],
"TIM1_CH4" : [(2,4)],
"TIM1_COM" : [(2,4)],
"TIM1_TRIG" : [(2,0),(2,4)],
"TIM1_UP" : [(2,5)],
"TIM2_CH1" : [(1,5)],
"TIM2_CH2" : [(1,6)],
"TIM2_CH3" : [(1,1)],
"TIM2_CH4" : [(1,6),(1,7)],
"TIM2_UP" : [(1,1),(1,7)],
"TIM3_CH1" : [(1,4)],
"TIM3_CH2" : [(1,5)],
"TIM3_CH3" : [(1,7)],
"TIM3_CH4" : [(1,2)],
"TIM3_TRIG" : [(1,4)],
"TIM3_UP" : [(1,2)],
"TIM4_CH1" : [(1,0)],
"TIM4_CH2" : [(1,3)],
"TIM4_CH3" : [(1,7)],
"TIM4_UP" : [(1,6)],
"TIM5_CH1" : [(1,2)],
"TIM5_CH2" : [(1,4)],
"TIM5_CH3" : [(1,0)],
"TIM5_CH4" : [(1,1),(1,3)],
"TIM5_TRIG" : [(1,1),(1,3)],
"TIM5_UP" : [(1,0),(1,6)],
"TIM6_UP" : [(1,1)],
"TIM7_UP" : [(1,2),(1,4)],
"TIM8_CH1" : [(2,2),(2,2)],
"TIM8_CH2" : [(2,2),(2,3)],
"TIM8_CH3" : [(2,2),(2,4)],
"TIM8_CH4" : [(2,7)],
"TIM8_COM" : [(2,7)],
"TIM8_TRIG" : [(2,7)],
"TIM8_UP" : [(2,1)],
"UART4_RX" : [(1,2)],
"UART4_TX" : [(1,4)],
"UART5_RX" : [(1,0)],
"UART5_TX" : [(1,7)],
"USART1_RX" : [(2,2),(2,5)],
"USART1_TX" : [(2,7)],
"USART2_RX" : [(1,5)],
"USART2_TX" : [(1,6)],
"USART3_RX" : [(1,1)],
"USART3_TX" : [(1,3),(1,4)],
"USART6_RX" : [(2,1),(2,2)],
"USART6_TX" : [(2,6),(2,7)],
# format is (DMA_TABLE, StreamNum, Channel)
# extracted from tabula-STM32F4x7-dma.csv
"ADC1" : [(2,0,0),(2,4,0)],
"ADC2" : [(2,2,1),(2,3,1)],
"ADC3" : [(2,0,2),(2,1,2)],
"CRYP_IN" : [(2,6,2)],
"CRYP_OUT" : [(2,5,2)],
"DAC1" : [(1,5,7)],
"DAC2" : [(1,6,7)],
"DCMI" : [(2,1,1),(2,7,1)],
"HASH_IN" : [(2,7,2)],
"I2C1_RX" : [(1,0,1),(1,5,1)],
"I2C1_TX" : [(1,6,1),(1,7,1)],
"I2C2_RX" : [(1,2,7),(1,3,7)],
"I2C2_TX" : [(1,7,7)],
"I2C3_RX" : [(1,2,3)],
"I2C3_TX" : [(1,4,3)],
"I2S2_EXT_RX" : [(1,3,3)],
"I2S2_EXT_TX" : [(1,4,2)],
"I2S3_EXT_RX" : [(1,2,2),(1,0,3)],
"I2S3_EXT_TX" : [(1,5,2)],
"SDIO" : [(2,3,4),(2,6,4)],
"SPI1_RX" : [(2,0,3),(2,2,3)],
"SPI1_TX" : [(2,3,3),(2,5,3)],
"SPI2_RX" : [(1,3,0)],
"SPI2_TX" : [(1,4,0)],
"SPI3_RX" : [(1,0,0),(1,2,0)],
"SPI3_TX" : [(1,5,0),(1,7,0)],
"TIM1_CH1" : [(2,6,0),(2,1,6),(2,3,6)],
"TIM1_CH2" : [(2,6,0),(2,2,6)],
"TIM1_CH3" : [(2,6,0),(2,6,6)],
"TIM1_CH4" : [(2,4,6)],
"TIM1_COM" : [(2,4,6)],
"TIM1_TRIG" : [(2,0,6),(2,4,6)],
"TIM1_UP" : [(2,5,6)],
"TIM2_CH1" : [(1,5,3)],
"TIM2_CH2" : [(1,6,3)],
"TIM2_CH3" : [(1,1,3)],
"TIM2_CH4" : [(1,6,3),(1,7,3)],
"TIM2_UP" : [(1,1,3),(1,7,3)],
"TIM3_CH1" : [(1,4,5)],
"TIM3_CH2" : [(1,5,5)],
"TIM3_CH3" : [(1,7,5)],
"TIM3_CH4" : [(1,2,5)],
"TIM3_TRIG" : [(1,4,5)],
"TIM3_UP" : [(1,2,5)],
"TIM4_CH1" : [(1,0,2)],
"TIM4_CH2" : [(1,3,2)],
"TIM4_CH3" : [(1,7,2)],
"TIM4_UP" : [(1,6,2)],
"TIM5_CH1" : [(1,2,6)],
"TIM5_CH2" : [(1,4,6)],
"TIM5_CH3" : [(1,0,6)],
"TIM5_CH4" : [(1,1,6),(1,3,6)],
"TIM5_TRIG" : [(1,1,6),(1,3,6)],
"TIM5_UP" : [(1,0,6),(1,6,6)],
"TIM6_UP" : [(1,1,7)],
"TIM7_UP" : [(1,2,1),(1,4,1)],
"TIM8_CH1" : [(2,2,0),(2,2,7)],
"TIM8_CH2" : [(2,2,0),(2,3,7)],
"TIM8_CH3" : [(2,2,0),(2,4,7)],
"TIM8_CH4" : [(2,7,7)],
"TIM8_COM" : [(2,7,7)],
"TIM8_TRIG" : [(2,7,7)],
"TIM8_UP" : [(2,1,7)],
"UART4_RX" : [(1,2,4)],
"UART4_TX" : [(1,4,4)],
"UART5_RX" : [(1,0,4)],
"UART5_TX" : [(1,7,4)],
"USART1_RX" : [(2,2,4),(2,5,4)],
"USART1_TX" : [(2,7,4)],
"USART2_RX" : [(1,5,4)],
"USART2_TX" : [(1,6,4)],
"USART3_RX" : [(1,1,4)],
"USART3_TX" : [(1,3,4),(1,4,7)],
"USART6_RX" : [(2,1,5),(2,2,5)],
"USART6_TX" : [(2,6,5),(2,7,5)],
}
AltFunction_map = {
@ -442,6 +443,7 @@ AltFunction_map = {
"PD6:FMC_NWAIT" : 12,
"PD6:I2S3_SD" : 5,
"PD6:LCD_B2" : 14,
"PD6:SAI1_SD_A" : 6,
"PD6:SPI3_MOSI" : 5,
"PD6:USART2_RX" : 7,
"PD7:EVENTOUT" : 15,
@ -465,18 +467,22 @@ AltFunction_map = {
"PE11:EVENTOUT" : 15,
"PE11:FMC_D8" : 12,
"PE11:LCD_G3" : 14,
"PE11:SPI4_NSS" : 5,
"PE11:TIM1_CH2" : 1,
"PE12:EVENTOUT" : 15,
"PE12:FMC_D9" : 12,
"PE12:LCD_B4" : 14,
"PE12:SPI4_SCK" : 5,
"PE12:TIM1_CH3N" : 1,
"PE13:EVENTOUT" : 15,
"PE13:FMC_D10" : 12,
"PE13:LCD_DE" : 14,
"PE13:SPI4_MISO" : 5,
"PE13:TIM1_CH3" : 1,
"PE14:EVENTOUT" : 15,
"PE14:FMC_D11" : 12,
"PE14:LCD_CLK" : 14,
"PE14:SPI4_MOSI" : 5,
"PE14:TIM1_CH4" : 1,
"PE15:" : 5,
"PE15:EVENTOUT" : 15,
@ -490,25 +496,34 @@ AltFunction_map = {
"PE2:ETH_MII_TXD3" : 11,
"PE2:EVENTOUT" : 15,
"PE2:FMC_A23" : 12,
"PE2:SAI1_MCLK_A" : 6,
"PE2:SPI4_SCK" : 5,
"PE2:TRACECLK" : 0,
"PE3:EVENTOUT" : 15,
"PE3:FMC_A19" : 12,
"PE3:SAI1_SD_B" : 6,
"PE3:TRACED0" : 0,
"PE4:DCMI_D4" : 13,
"PE4:EVENTOUT" : 15,
"PE4:FMC_A20" : 12,
"PE4:LCD_B0" : 14,
"PE4:SAI1_FS_A" : 6,
"PE4:SPI4_NSS" : 5,
"PE4:TRACED1" : 0,
"PE5:DCMI_D6" : 13,
"PE5:EVENTOUT" : 15,
"PE5:FMC_A21" : 12,
"PE5:LCD_G0" : 14,
"PE5:SAI1_SCK_A" : 6,
"PE5:SPI4_MISO" : 5,
"PE5:TIM9_CH1" : 3,
"PE5:TRACED2" : 0,
"PE6:DCMI_D7" : 13,
"PE6:EVENTOUT" : 15,
"PE6:FMC_A22" : 12,
"PE6:LCD_G1" : 14,
"PE6:SAI1_SD_A" : 6,
"PE6:SPI4_MOSI" : 5,
"PE6:TIM9_CH2" : 3,
"PE6:TRACED3" : 0,
"PE7:EVENTOUT" : 15,
@ -532,6 +547,7 @@ AltFunction_map = {
"PF11:DCMI_D12" : 13,
"PF11:EVENTOUT" : 15,
"PF11:FMC_SDNRAS" : 12,
"PF11:SPI5_MOSI" : 5,
"PF12:EVENTOUT" : 15,
"PF12:FMC_A6" : 12,
"PF13:EVENTOUT" : 15,
@ -558,17 +574,25 @@ AltFunction_map = {
"PF5:FMC_A5" : 12,
"PF6:EVENTOUT" : 15,
"PF6:FMC_NIORD" : 12,
"PF6:SAI1_SD_B" : 6,
"PF6:SPI5_NSS" : 5,
"PF6:TIM10_CH1" : 3,
"PF6:UART7_RX" : 8,
"PF7:EVENTOUT" : 15,
"PF7:FMC_NREG" : 12,
"PF7:SAI1_MCLK_B" : 6,
"PF7:SPI5_SCK" : 5,
"PF7:TIM11_CH1" : 3,
"PF7:UART7_TX" : 8,
"PF8:EVENTOUT" : 15,
"PF8:FMC_NIOWR" : 12,
"PF8:SAI1_SCK_B" : 6,
"PF8:SPI5_MISO" : 5,
"PF8:TIM13_CH1" : 9,
"PF9:EVENTOUT" : 15,
"PF9:FMC_CD" : 12,
"PF9:SAI1_FS_B" : 6,
"PF9:SPI5_MOSI" : 5,
"PF9:TIM14_CH1" : 9,
"PG0:EVENTOUT" : 15,
"PG0:FMC_A10" : 12,
@ -588,16 +612,19 @@ AltFunction_map = {
"PG12:FMC_NE4" : 12,
"PG12:LCD_B1" : 14,
"PG12:LCD_B4" : 9,
"PG12:SPI6_MISO" : 5,
"PG12:USART6_RTS" : 8,
"PG13:ETH_MII_TXD0" : 11,
"PG13:ETH_RMII_TXD0" : 11,
"PG13:EVENTOUT" : 15,
"PG13:FMC_A24" : 12,
"PG13:SPI6_SCK" : 5,
"PG13:USART6_CTS" : 8,
"PG14:ETH_MII_TXD1" : 11,
"PG14:ETH_RMII_TXD1" : 11,
"PG14:EVENTOUT" : 15,
"PG14:FMC_A25" : 12,
"PG14:SPI6_MOSI" : 5,
"PG14:USART6_TX" : 8,
"PG15:DCMI_D13" : 13,
"PG15:EVENTOUT" : 15,
@ -627,6 +654,7 @@ AltFunction_map = {
"PG8:ETH_PPS_OUT" : 11,
"PG8:EVENTOUT" : 15,
"PG8:FMC_SDCLK" : 12,
"PG8:SPI6_NSS" : 5,
"PG8:USART6_RTS" : 8,
"PG9:DCMI_VSYNC(1)" : 13,
"PG9:EVENTOUT" : 15,
@ -679,14 +707,17 @@ AltFunction_map = {
"PH5:EVENTOUT" : 15,
"PH5:FMC_SDNWE" : 12,
"PH5:I2C2_SDA" : 4,
"PH5:SPI5_NSS" : 5,
"PH6:DCMI_D8" : 13,
"PH6:FMC_SDNE1" : 12,
"PH6:I2C2_SMBA" : 4,
"PH6:SPI5_SCK" : 5,
"PH6:TIM12_CH1" : 9,
"PH7:DCMI_D9" : 13,
"PH7:ETH_MII_RXD3" : 11,
"PH7:FMC_SDCKE1" : 12,
"PH7:I2C3_SCL" : 4,
"PH7:SPI5_MISO" : 5,
"PH8:DCMI_HSYNC" : 13,
"PH8:EVENTOUT" : 15,
"PH8:FMC_D16" : 12,

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@ -345,7 +345,7 @@ def write_mcu_config(f):
flash_size = get_config('FLASH_SIZE_KB', type=int)
f.write('#define BOARD_FLASH_SIZE %u\n' % flash_size)
f.write('#define CRT1_AREAS_NUMBER 1\n')
if mcu_type in ['STM32F427xx', 'STM32F405xx']:
if mcu_type in ['STM32F427xx', 'STM32F407xx','STM32F405xx']:
def_ccm_size = 64
else:
def_ccm_size = None