diff --git a/Tools/bootloaders/f4by-ch_bl.bin b/Tools/bootloaders/f4by-ch_bl.bin new file mode 100755 index 0000000000..49ede82c14 Binary files /dev/null and b/Tools/bootloaders/f4by-ch_bl.bin differ diff --git a/Tools/bootloaders/f4by-ch_bl.elf b/Tools/bootloaders/f4by-ch_bl.elf new file mode 100755 index 0000000000..c4adfcca76 Binary files /dev/null and b/Tools/bootloaders/f4by-ch_bl.elf differ diff --git a/Tools/bootloaders/f4by-ch_bl.hex b/Tools/bootloaders/f4by-ch_bl.hex new file mode 100644 index 0000000000..b36aefd980 Binary files /dev/null and b/Tools/bootloaders/f4by-ch_bl.hex differ diff --git a/libraries/AP_HAL_ChibiOS/hwdef/f4by-ch/hwdef-bl.dat b/libraries/AP_HAL_ChibiOS/hwdef/f4by-ch/hwdef-bl.dat new file mode 100644 index 0000000000..21d2f5249a --- /dev/null +++ b/libraries/AP_HAL_ChibiOS/hwdef/f4by-ch/hwdef-bl.dat @@ -0,0 +1,45 @@ +# hw definition file for processing by chibios_hwdef.py +# for f4by bootloader + +MCU STM32F4xx STM32F407xx + +APJ_BOARD_ID 20 + +OSCILLATOR_HZ 8000000 +STM32_PLLM_VALUE 8 + + +# board voltage +STM32_VDD 330U + +STM32_ST_USE_TIMER 5 + +# flash size +FLASH_SIZE_KB 1024 + +# order of UARTs (and USB) +UART_ORDER OTG1 USART2 + +PE3 LED_BOOTLOADER OUTPUT +PE2 LED_ACTIVITY OUTPUT +define HAL_LED_ON 1 + +PA9 VBUS INPUT + +PA11 OTG_FS_DM OTG1 +PA12 OTG_FS_DP OTG1 + +PA13 JTMS-SWDIO SWD +PA14 JTCK-SWCLK SWD + +PD5 USART2_TX USART2 +PD6 USART2_RX USART2 + +FLASH_USE_MAX_KB 16 +FLASH_RESERVE_START_KB 0 + +define HAL_USE_EMPTY_STORAGE 1 +define HAL_STORAGE_SIZE 16384 + +# location of application code +define FLASH_BOOTLOADER_LOAD_KB 16 diff --git a/libraries/AP_HAL_ChibiOS/hwdef/f4by-ch/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/f4by-ch/hwdef.dat index 06c1cafcac..c3ae77bf22 100755 --- a/libraries/AP_HAL_ChibiOS/hwdef/f4by-ch/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/f4by-ch/hwdef.dat @@ -5,7 +5,7 @@ MCU STM32F4xx STM32F407xx # board ID for firmware load -APJ_BOARD_ID 129 +APJ_BOARD_ID 20 define CONFIG_HAL_BOARD_SUBTYPE HAL_BOARD_SUBTYPE_CHIBIOS_F4BY # USB setup