mirror of https://github.com/ArduPilot/ardupilot
hwdef: don't use DEFAULTGPIO in bootloaders
setting up a DEFAULTGPIO pulldown in bootloaders is a bad idea as it overrides any hardware pullups that have been put in place as part of a "hold in bootloader" mechanism. See discussion in #27360 for ELRS note that this only impacts one board that I can see, the BlitzF745AIO, due to the MCU vs DEFAULTGPIO interaction
This commit is contained in:
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ed58758ce6
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@ -24,8 +24,7 @@ env OPTIMIZE -Os
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# order of UARTs (and USB)
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# order of UARTs (and USB)
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SERIAL_ORDER OTG1 UART7 UART5 USART3
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SERIAL_ORDER OTG1 UART7 UART5 USART3
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# USB
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# USB
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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@ -30,8 +30,7 @@ PA12 OTG_FS_DP OTG1
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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PA10 USART1_RX USART1 HIGH PULLUP
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PA10 USART1_RX USART1 HIGH PULLUP
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PB11 USART3_RX USART3 HIGH PULLUP
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PB11 USART3_RX USART3 HIGH PULLUP
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@ -30,8 +30,7 @@ PA12 OTG_FS_DP OTG1
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -3,8 +3,7 @@
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# for IFLIGHT_BLITZ_F7_AIO hardware.
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# for IFLIGHT_BLITZ_F7_AIO hardware.
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# thanks to betaflight for pin information
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# thanks to betaflight for pin information
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# MCU class and specific type
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# MCU class and specific type
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MCU STM32F7xx STM32F745xx
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MCU STM32F7xx STM32F745xx
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@ -30,8 +30,7 @@ PA12 OTG_FS_DP OTG1
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -1,8 +1,7 @@
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# hw definition file for processing by chibios_hwdef.py
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# hw definition file for processing by chibios_hwdef.py
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# for the BotBloxSwitch hardware
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# for the BotBloxSwitch hardware
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# MCU class and specific type
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# MCU class and specific type
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MCU STM32H7xx STM32H723xx
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MCU STM32H7xx STM32H723xx
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@ -1,9 +1,6 @@
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# hw definition file for processing by chibios_hwdef.py
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# hw definition file for processing by chibios_hwdef.py
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# for the CBUnmanned H743 Stamp hardware
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# for the CBUnmanned H743 Stamp hardware
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# default to all pins low to avoid ESD issues
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#DEFAULTGPIO OUTPUT LOW PULLDOWN
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# MCU class and specific type
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# MCU class and specific type
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MCU STM32H7xx STM32H743xx
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MCU STM32H7xx STM32H743xx
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -27,8 +27,7 @@ SERIAL_ORDER OTG1
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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PA12 OTG_FS_DP OTG1
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PA12 OTG_FS_DP OTG1
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -30,8 +30,7 @@ PA12 OTG_FS_DP OTG1
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -42,8 +42,7 @@ SERIAL_ORDER OTG1 UART7 UART5 USART3
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STDOUT_SERIAL SD3
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STDOUT_SERIAL SD3
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STDOUT_BAUDRATE 921600
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STDOUT_BAUDRATE 921600
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# USB OTG1 SERIAL0
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# USB OTG1 SERIAL0
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -35,8 +35,7 @@ PC13 BUZZER OUTPUT LOW PULLDOWN
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PC2 LED_BOOTLOADER OUTPUT LOW
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PC2 LED_BOOTLOADER OUTPUT LOW
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define HAL_LED_ON 1
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define HAL_LED_ON 1
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Add CS pins to ensure they are high in bootloader
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# Add CS pins to ensure they are high in bootloader
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PE4 IMU_CS CS
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PE4 IMU_CS CS
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@ -35,8 +35,7 @@ PC13 BUZZER OUTPUT LOW PULLDOWN
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PC2 LED_BOOTLOADER OUTPUT LOW
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PC2 LED_BOOTLOADER OUTPUT LOW
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define HAL_LED_ON 1
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define HAL_LED_ON 1
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Add CS pins to ensure they are high in bootloader
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# Add CS pins to ensure they are high in bootloader
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PE4 IMU_CS CS
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PE4 IMU_CS CS
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@ -33,8 +33,7 @@ PE3 BUZZER OUTPUT LOW PULLDOWN
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PE5 LED_BOOTLOADER OUTPUT LOW
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PE5 LED_BOOTLOADER OUTPUT LOW
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define HAL_LED_ON 1
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define HAL_LED_ON 1
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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PC5 VTX_PWR OUTPUT HIGH
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PC5 VTX_PWR OUTPUT HIGH
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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PA12 OTG_FS_DP OTG1
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PA12 OTG_FS_DP OTG1
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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#CS pin
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#CS pin
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PB12 AT7456E_CS CS
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PB12 AT7456E_CS CS
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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#CS pin
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#CS pin
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PB12 AT7456E_CS CS
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PB12 AT7456E_CS CS
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# the location where the bootloader will put the firmware
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# the location where the bootloader will put the firmware
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FLASH_BOOTLOADER_LOAD_KB 128
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FLASH_BOOTLOADER_LOAD_KB 128
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# order of UARTs (and USB)
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# order of UARTs (and USB)
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SERIAL_ORDER OTG1 USART1
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SERIAL_ORDER OTG1 USART1
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# the location where the bootloader will put the firmware
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# the location where the bootloader will put the firmware
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FLASH_BOOTLOADER_LOAD_KB 128
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FLASH_BOOTLOADER_LOAD_KB 128
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# order of UARTs (and USB)
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# order of UARTs (and USB)
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SERIAL_ORDER OTG1
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SERIAL_ORDER OTG1
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -29,8 +29,7 @@ env OPTIMIZE -Os
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# order of UARTs (and USB)
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# order of UARTs (and USB)
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SERIAL_ORDER OTG1 UART7 UART5 USART2 USART3
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SERIAL_ORDER OTG1 UART7 UART5 USART2 USART3
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# USB
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# USB
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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# order of UARTs (and USB)
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# order of UARTs (and USB)
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SERIAL_ORDER OTG1 UART7 UART5 USART3
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SERIAL_ORDER OTG1 UART7 UART5 USART3
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# USB
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# USB
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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# order of UARTs (and USB)
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# order of UARTs (and USB)
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SERIAL_ORDER OTG1 UART7 UART5 USART3
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SERIAL_ORDER OTG1 UART7 UART5 USART3
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# USB
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# USB
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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define HAL_USE_EMPTY_STORAGE 1
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define HAL_USE_EMPTY_STORAGE 1
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define HAL_STORAGE_SIZE 16384
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define HAL_STORAGE_SIZE 16384
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Add CS pins to ensure they are high in bootloader
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# Add CS pins to ensure they are high in bootloader
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PB12 ICM20602_2_CS CS
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PB12 ICM20602_2_CS CS
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define HAL_USE_EMPTY_STORAGE 1
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define HAL_USE_EMPTY_STORAGE 1
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define HAL_STORAGE_SIZE 16384
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define HAL_STORAGE_SIZE 16384
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Add CS pins to ensure they are high in bootloader
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# Add CS pins to ensure they are high in bootloader
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PA15 ICM42688_CS CS
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PA15 ICM42688_CS CS
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define HAL_LED_ON 0
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define HAL_LED_ON 0
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define HAL_LED_OFF 1
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define HAL_LED_OFF 1
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Add CS pins to ensure they are high in bootloader
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# Add CS pins to ensure they are high in bootloader
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PC15 BMI270_CS1 CS
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PC15 BMI270_CS1 CS
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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PA12 OTG_FS_DP OTG1
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PA12 OTG_FS_DP OTG1
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Add CS pins to ensure they are high in bootloader
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# Add CS pins to ensure they are high in bootloader
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PA4 MPU_CS CS
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PA4 MPU_CS CS
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PB12 OSD_CS CS
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PB12 OSD_CS CS
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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# board ID for firmware load
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# board ID for firmware load
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APJ_BOARD_ID 41775
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APJ_BOARD_ID 41775
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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FLASH_SIZE_KB 2048
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FLASH_SIZE_KB 2048
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PA11 OTG_FS_DM OTG1
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PA11 OTG_FS_DM OTG1
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PA12 OTG_FS_DP OTG1
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PA12 OTG_FS_DP OTG1
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Add CS pins to ensure they are high in bootloader
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# Add CS pins to ensure they are high in bootloader
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PA4 MPU6000_CS CS
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PA4 MPU6000_CS CS
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PB12 MAX7456_CS CS
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PB12 MAX7456_CS CS
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PA13 JTMS-SWDIO SWD
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PA13 JTMS-SWDIO SWD
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PA14 JTCK-SWCLK SWD
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PA14 JTCK-SWCLK SWD
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# default to all pins low to avoid ESD issues
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DEFAULTGPIO OUTPUT LOW PULLDOWN
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# Chip select pins
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# Chip select pins
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@ -77,5 +77,4 @@ PC15 ICM20602_CS CS
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PD7 MS5611_CS CS
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PD7 MS5611_CS CS
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PD10 FRAM_CS CS SPEED_VERYLOW
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PD10 FRAM_CS CS SPEED_VERYLOW
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||||||
# default to all pins low to avoid ESD issues
|
|
||||||
DEFAULTGPIO OUTPUT LOW PULLDOWN
|
|
||||||
|
|
|
@ -77,5 +77,4 @@ PC15 ICM20602_CS CS
|
||||||
PD7 MS5611_CS CS
|
PD7 MS5611_CS CS
|
||||||
PD10 FRAM_CS CS SPEED_VERYLOW
|
PD10 FRAM_CS CS SPEED_VERYLOW
|
||||||
|
|
||||||
# default to all pins low to avoid ESD issues
|
|
||||||
DEFAULTGPIO OUTPUT LOW PULLDOWN
|
|
||||||
|
|
Loading…
Reference in New Issue