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AP_HAL_ChibiOS: move to using PLL2_R_CK for QSPI
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@ -266,7 +266,7 @@
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#define STM32_CKPERSEL STM32_CKPERSEL_HSE_CK
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#endif
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#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL1_Q_CK
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#define STM32_QSPISEL STM32_QSPISEL_HCLK
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#define STM32_QSPISEL STM32_QSPISEL_PLL2_R_CK
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#define STM32_FMCSEL STM32_QSPISEL_HCLK
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#define STM32_SWPSEL STM32_SWPSEL_PCLK1
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#define STM32_FDCANSEL STM32_FDCANSEL_PLL2_Q_CK
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