Mirror/ardupilot
5
0
Fork 0
mirror of https://github.com/ArduPilot/ardupilot synced 2025-01-03 14:38:30 -04:00
Code Issues Packages Projects Releases Wiki Activity

AP_IOMCU: ChibiOS 20.3.x build fix

Browse Source
This commit is contained in:
Andy Piper 2021-02-19 20:48:33 +00:00 committed by Andrew Tridgell
parent 03205595fb
commit c26f49fb0a
1 changed files with 4 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
libraries/AP_IOMCU/iofirmware/iofirmware.cpp
View File

@ -64,14 +64,14 @@ static void dma_rx_end_cb(UARTDriver *uart)
dmaStreamSetMemory0(uart->dmarx, &iomcu.rx_io_packet); dmaStreamSetMemory0(uart->dmarx, &iomcu.rx_io_packet);
dmaStreamSetTransactionSize(uart->dmarx, sizeof(iomcu.rx_io_packet)); dmaStreamSetTransactionSize(uart->dmarx, sizeof(iomcu.rx_io_packet));
dmaStreamSetMode(uart->dmarx, uart->dmamode | STM32_DMA_CR_DIR_P2M | dmaStreamSetMode(uart->dmarx, uart->dmarxmode | STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE); STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
dmaStreamEnable(uart->dmarx); dmaStreamEnable(uart->dmarx);
uart->usart->CR3 |= USART_CR3_DMAR; uart->usart->CR3 |= USART_CR3_DMAR;
dmaStreamSetMemory0(uart->dmatx, &iomcu.tx_io_packet); dmaStreamSetMemory0(uart->dmatx, &iomcu.tx_io_packet);
dmaStreamSetTransactionSize(uart->dmatx, iomcu.tx_io_packet.get_size()); dmaStreamSetTransactionSize(uart->dmatx, iomcu.tx_io_packet.get_size());
dmaStreamSetMode(uart->dmatx, uart->dmamode | STM32_DMA_CR_DIR_M2P | dmaStreamSetMode(uart->dmatx, uart->dmatxmode | STM32_DMA_CR_DIR_M2P |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE); STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
dmaStreamEnable(uart->dmatx); dmaStreamEnable(uart->dmatx);
uart->usart->CR3 |= USART_CR3_DMAT; uart->usart->CR3 |= USART_CR3_DMAT;
@ -101,7 +101,7 @@ static void idle_rx_handler(UARTDriver *uart)
dmaStreamSetMemory0(uart->dmarx, &iomcu.rx_io_packet); dmaStreamSetMemory0(uart->dmarx, &iomcu.rx_io_packet);
dmaStreamSetTransactionSize(uart->dmarx, sizeof(iomcu.rx_io_packet)); dmaStreamSetTransactionSize(uart->dmarx, sizeof(iomcu.rx_io_packet));
dmaStreamSetMode(uart->dmarx, uart->dmamode | STM32_DMA_CR_DIR_P2M | dmaStreamSetMode(uart->dmarx, uart->dmarxmode | STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE); STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE);
dmaStreamEnable(uart->dmarx); dmaStreamEnable(uart->dmarx);
uart->usart->CR3 |= USART_CR3_DMAR; uart->usart->CR3 |= USART_CR3_DMAR;
@ -124,6 +124,7 @@ static UARTConfig uart_cfg = {
nullptr, nullptr,
nullptr, nullptr,
idle_rx_handler, idle_rx_handler,
nullptr,
1500000, //1.5MBit 1500000, //1.5MBit
USART_CR1_IDLEIE, USART_CR1_IDLEIE,
0, 0,