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https://github.com/ArduPilot/ardupilot
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AP_IOMCU: added APIs for RC input
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@ -67,16 +67,26 @@ enum ioevents {
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IOEVENT_SET_ONESHOT_OFF,
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IOEVENT_SET_RATES,
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IOEVENT_GET_RCIN,
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IOEVENT_ENABLE_SBUS,
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};
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// setup page registers
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#define PAGE_REG_SETUP_FEATURES 0
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#define P_SETUP_FEATURES_SBUS1_OUT 1
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#define P_SETUP_FEATURES_SBUS2_OUT 2
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#define P_SETUP_FEATURES_PWM_RSSI 4
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#define P_SETUP_FEATURES_ADC_RSSI 8
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#define P_SETUP_FEATURES_ONESHOT 16
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#define PAGE_REG_SETUP_ARMING 1
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#define P_SETUP_ARMING_IO_ARM_OK (1<<0)
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#define P_SETUP_ARMING_FMU_ARMED (1<<1)
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#define P_SETUP_ARMING_RC_HANDLING_DISABLED (1<<6)
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#define PAGE_REG_SETUP_PWM_RATE_MASK 2
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#define PAGE_REG_SETUP_DEFAULTRATE 3
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#define PAGE_REG_SETUP_ALTRATE 4
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#define PAGE_REG_SETUP_SBUS_RATE 19
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#define PAGE_REG_SETUP_FORCE_SAFETY_OFF 12
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#define PAGE_REG_SETUP_FORCE_SAFETY_ON 14
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@ -117,11 +127,16 @@ void AP_IOMCU::thread_main(void)
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{
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// uart runs at 1.5MBit
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uart.begin(1500*1000, 256, 256);
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uart.set_blocking_writes(false);
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// set IO_ARM_OK and FMU_ARMED
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modify_register(PAGE_SETUP, PAGE_REG_SETUP_ARMING, 0,
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P_SETUP_ARMING_IO_ARM_OK |
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P_SETUP_ARMING_FMU_ARMED);
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P_SETUP_ARMING_FMU_ARMED |
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P_SETUP_ARMING_RC_HANDLING_DISABLED);
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// enable sbus (until we have BRD_SBUS_OUT available in ChibiOS)
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enable_sbus_out(150);
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while (true) {
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eventmask_t mask = chEvtWaitAnyTimeout(~0, MS2ST(10));
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@ -145,6 +160,12 @@ void AP_IOMCU::thread_main(void)
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write_register(PAGE_SETUP, PAGE_REG_SETUP_PWM_RATE_MASK, rate.chmask);
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}
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if (mask & EVENT_MASK(IOEVENT_ENABLE_SBUS)) {
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write_register(PAGE_SETUP, PAGE_REG_SETUP_SBUS_RATE, rate.sbus_rate_hz);
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modify_register(PAGE_SETUP, PAGE_REG_SETUP_FEATURES, 0,
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P_SETUP_FEATURES_SBUS1_OUT);
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}
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// check for regular timed events
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uint32_t now = AP_HAL::millis();
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if (now - last_rc_read_ms > 20) {
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@ -190,6 +211,9 @@ void AP_IOMCU::read_rc_input()
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// read a min of 9 channels and max of max_channels
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uint8_t n = MIN(MAX(9, rc_input.count), max_channels);
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read_registers(PAGE_RAW_RCIN, 0, 6+n, (uint16_t *)&rc_input);
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if (rc_input.flags_rc_ok) {
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rc_input.last_input_us = AP_HAL::micros();
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}
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}
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/*
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@ -197,7 +221,8 @@ void AP_IOMCU::read_rc_input()
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*/
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void AP_IOMCU::read_status()
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{
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read_registers(PAGE_STATUS, 0, sizeof(reg_status)/2, (uint16_t *)®_status);
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uint16_t *r = (uint16_t *)®_status;
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read_registers(PAGE_STATUS, 0, sizeof(reg_status)/2, r);
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}
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/*
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@ -432,3 +457,25 @@ uint16_t AP_IOMCU::get_freq(uint16_t chan)
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}
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return rate.default_freq;
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}
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// enable SBUS out
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bool AP_IOMCU::enable_sbus_out(uint16_t rate_hz)
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{
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rate.sbus_rate_hz = rate_hz;
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trigger_event(IOEVENT_ENABLE_SBUS);
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return true;
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}
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/*
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check for new RC input
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*/
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bool AP_IOMCU::check_rcinput(uint32_t &last_frame_us, uint8_t &num_channels, uint16_t *channels, uint8_t max_chan)
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{
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if (last_frame_us != rc_input.last_input_us) {
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num_channels = MIN(MIN(rc_input.count, max_channels), max_chan);
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memcpy(channels, rc_input.pwm, num_channels*2);
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last_frame_us = rc_input.last_input_us;
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return true;
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}
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return false;
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}
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@ -41,6 +41,16 @@ public:
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// force safety off
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void force_safety_off(void);
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/*
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enable sbus output
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*/
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bool enable_sbus_out(uint16_t rate_hz);
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/*
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check for new RC input
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*/
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bool check_rcinput(uint32_t &last_frame_us, uint8_t &num_channels, uint16_t *channels, uint8_t max_channels);
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private:
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AP_HAL::UARTDriver &uart;
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@ -116,12 +126,19 @@ private:
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// PAGE_RAW_RCIN values
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struct PACKED {
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uint16_t count;
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uint16_t flags;
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uint16_t flags_frame_drop:1;
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uint16_t flags_failsafe:1;
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uint16_t flags_dsm11:1;
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uint16_t flags_mapping_ok:1;
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uint16_t flags_rc_ok:1;
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uint16_t flags_unused:11;
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uint16_t nrssi;
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uint16_t data;
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uint16_t frame_count;
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uint16_t lost_frame_count;
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uint16_t pwm[max_channels];
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uint16_t last_frame_count;
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uint32_t last_input_us;
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} rc_input;
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// output pwm values
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@ -140,6 +157,7 @@ private:
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uint16_t freq;
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uint16_t chmask;
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uint16_t default_freq = 50;
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uint16_t sbus_rate_hz;
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} rate;
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bool corked;
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