AP_HAL_SITL: improve periph simulation efficiency

Removes busywait for simulation state packet, dramatically reducing CPU
usage. The dominant wait time in AP_Periph is 1024 microseconds as this
is the default value of HAL_PERIPH_LOOP_DELAY_US, so a 1ms wait is
unlikely to be a problem.
This commit is contained in:
Thomas Watson 2024-07-13 12:00:11 -05:00 committed by Andrew Tridgell
parent 8dcd3986c7
commit a3aa278589
1 changed files with 2 additions and 3 deletions

View File

@ -124,10 +124,9 @@ void SITL_State::wait_clock(uint64_t wait_time_usec)
{
while (AP_HAL::micros64() < wait_time_usec) {
struct sitl_input input {};
sitl_model->update(input);
sitl_model->update(input); // delays up to 1 millisecond
sim_update();
update_voltage_current(input, 0);
usleep(100);
}
}
@ -195,7 +194,7 @@ void SimMCast::multicast_read(void)
printf("Waiting for multicast state\n");
}
struct SITL::sitl_fdm state;
while (sock.recv((void*)&state, sizeof(state), 0) != sizeof(state)) {
while (sock.recv((void*)&state, sizeof(state), 1) != sizeof(state)) {
// nop
}
if (_sitl->state.timestamp_us == 0) {