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HAL_ChibiOS: added minimal hwdef for STM32H743 Nucleo board

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This commit is contained in:
Andrew Tridgell 2019-02-03 20:24:21 +11:00
parent 4d3cbd95ac
commit 972ae519a6
2 changed files with 81 additions and 0 deletions
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43
libraries/AP_HAL_ChibiOS/hwdef/NucleoH743/hwdef-bl.dat Normal file
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# hw definition file for processing by chibios_hwdef.py
# for H743 bootloader
# MCU class and specific type
MCU STM32H7xx STM32H743xx
# crystal frequency
OSCILLATOR_HZ 8000000
define STM32_LSEDRV (3U << 3U)
define STM32_HSE_BYPASS
define STM32_LSECLK 32768
define STM32_PLL1_DIVM_VALUE 4
define STM32_PLL2_DIVM_VALUE 4
define STM32_PLL3_DIVM_VALUE 8
# board ID for firmware load
APJ_BOARD_ID 139
FLASH_SIZE_KB 2048
# bootloader is installed at zero offset
FLASH_RESERVE_START_KB 0
# the location where the bootloader will put the firmware
# the H743 has 128k sectors
define FLASH_BOOTLOADER_LOAD_KB 128
# board voltage
STM32_VDD 330U
# order of UARTs (and USB)
UART_ORDER OTG1
PA11 OTG_FS_DM OTG1
PA12 OTG_FS_DP OTG1
PA13 JTMS-SWDIO SWD
PA14 JTCK-SWCLK SWD
define HAL_USE_EMPTY_STORAGE 1
define HAL_STORAGE_SIZE 16384

38
libraries/AP_HAL_ChibiOS/hwdef/NucleoH743/hwdef.dat Normal file
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# hw definition file for processing by chibios_hwdef.py
# for H743 bootloader
# MCU class and specific type
MCU STM32H7xx STM32H743xx
# crystal frequency
OSCILLATOR_HZ 8000000
define STM32_LSEDRV (3U << 3U)
define STM32_HSE_BYPASS
define STM32_LSECLK 32768
define STM32_PLL1_DIVM_VALUE 4
define STM32_PLL2_DIVM_VALUE 4
define STM32_PLL3_DIVM_VALUE 8
# board ID for firmware load
APJ_BOARD_ID 139
FLASH_SIZE_KB 2048
FLASH_RESERVE_START_KB 128
# board voltage
STM32_VDD 330U
# order of UARTs (and USB)
UART_ORDER OTG1
PA11 OTG_FS_DM OTG1
PA12 OTG_FS_DP OTG1
PA13 JTMS-SWDIO SWD
PA14 JTCK-SWCLK SWD
define HAL_USE_EMPTY_STORAGE 1
define HAL_STORAGE_SIZE 16384