mirror of https://github.com/ArduPilot/ardupilot
AP_HAL_ESP32: RCOutput: add support for brushed PWM mode
Also adds some infrastructure for changing PWM group mode, though this is likely the complete set that can be supported with the ESP32 PWM peripheral.
This commit is contained in:
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b30e873c96
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@ -67,8 +67,10 @@ gpio_num_t outputs_pins[] = {};
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* (in the STM32 sense) which contain 2 GPIO pins. The pins are assigned
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* consecutively from the HAL_ESP32_RCOUT list. The frequency of each group can
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* be controlled independently by changing that timer's period.
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* * Running the timer at 1MHz allows 16-1000Hz with at least 1000 ticks per
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* cycle and makes assigning the compare value easy
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* * For "normal" PWM output, running the timer at 1MHz allows 16-1000Hz with
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* at least 1000 ticks per cycle and makes assigning the compare value easy
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* * For brushed PWM output, running the timer at 40MHz allows 650-32000Hz with
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* at least 1000 ticks per cycle and makes an easy divider setting
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*
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* MCPWM is only capable of PWM; DMA-based modes will require using the RMT
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* peripheral.
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@ -81,7 +83,10 @@ static_assert(SOC_MCPWM_OPERATORS_PER_GROUP >= SOC_MCPWM_TIMERS_PER_GROUP);
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// and one generator to one comparator
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static_assert(SOC_MCPWM_GENERATORS_PER_OPERATOR >= SOC_MCPWM_COMPARATORS_PER_OPERATOR);
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#define SERVO_TIMEBASE_RESOLUTION_HZ 1000000 // 1MHz, 1us per tick, 2x80 prescaler
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// default settings for PWM ("normal") and brushed mode. carefully understand
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// the prescaler update logic in set_group_mode before changing resolution!
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#define SERVO_TIMEBASE_RESOLUTION_HZ 1000000 // 1MHz, 1000ns per tick, 2x80 prescaler
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#define BRUSH_TIMEBASE_RESOLUTION_HZ 40000000 // 40MHz, 25ns per tick, 2x2 prescaler
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#define SERVO_DEFAULT_FREQ_HZ 50 // the rest of ArduPilot assumes this!
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@ -120,31 +125,23 @@ void RCOutput::init()
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for (int timer_num=0; timer_num<SOC_MCPWM_TIMERS_PER_GROUP; timer_num++) {
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RCOutput::pwm_group &group = *curr_group++;
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// set up the group to use the default frequency
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// set up the group to use the default frequency and mode
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group.mcpwm_group_id = mcpwm_group_id;
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group.h_timer = nullptr; // no timer yet
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group.rc_frequency = SERVO_DEFAULT_FREQ_HZ;
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group.ch_mask = 0;
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group.current_mode = MODE_PWM_NORMAL;
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// create timer with default tick rate and frequency, and configure
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// it to constantly run
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mcpwm_timer_config_t timer_config {
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.group_id = mcpwm_group_id,
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.clk_src = MCPWM_TIMER_CLK_SRC_PLL160M,
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.resolution_hz = SERVO_TIMEBASE_RESOLUTION_HZ,
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.count_mode = MCPWM_TIMER_COUNT_MODE_UP,
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.period_ticks = SERVO_TIMEBASE_RESOLUTION_HZ/SERVO_DEFAULT_FREQ_HZ,
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};
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ESP_ERROR_CHECK(mcpwm_new_timer(&timer_config, &group.h_timer));
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ESP_ERROR_CHECK(mcpwm_timer_enable(group.h_timer));
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ESP_ERROR_CHECK(mcpwm_timer_start_stop(group.h_timer, MCPWM_TIMER_START_NO_STOP));
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// create and connect operator
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// create the operator for this timer
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mcpwm_operator_config_t operator_config {
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.group_id = mcpwm_group_id,
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};
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ESP_ERROR_CHECK(mcpwm_new_operator(&operator_config, &group.h_oper));
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ESP_ERROR_CHECK(mcpwm_operator_connect_timer(group.h_oper, group.h_timer));
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// set the mode, which creates the timer and connects the operator
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set_group_mode(group);
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// set up comparators/generators
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for (int comparator_num=0; comparator_num<SOC_MCPWM_COMPARATORS_PER_OPERATOR; comparator_num++) {
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RCOutput::pwm_chan &ch = *curr_ch++;
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@ -185,6 +182,25 @@ void RCOutput::init()
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}
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}
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// constrain the frequency for the group given its current mode and return the
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// corresponding period for the timer
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uint32_t RCOutput::constrain_freq(pwm_group &group) {
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// clamp frequency to keep period between roughly 1000 (preserving output
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// resolution) and UINT16_MAX (hardware limit)
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unsigned int curr_freq = group.rc_frequency;
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switch (group.current_mode) {
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case MODE_PWM_BRUSHED:
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group.rc_frequency = constrain_value(curr_freq, 650U, 32000U);
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return BRUSH_TIMEBASE_RESOLUTION_HZ/group.rc_frequency;
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case MODE_PWM_NORMAL:
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default: // i.e. MODE_PWM_NONE
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// greater than 400 doesn't leave enough time for the down edge
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group.rc_frequency = constrain_value(curr_freq, 16U, 400U);
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return SERVO_TIMEBASE_RESOLUTION_HZ/group.rc_frequency;
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}
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}
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void RCOutput::set_freq(uint32_t chmask, uint16_t freq_hz)
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{
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if (!_initialized) {
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@ -193,13 +209,11 @@ void RCOutput::set_freq(uint32_t chmask, uint16_t freq_hz)
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for (auto &group : pwm_group_list) {
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if ((group.ch_mask & chmask) != 0) { // group has channels to set?
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// greater than 400 doesn't leave enough time for the down edge
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uint16_t group_freq = constrain_value((int)freq_hz, 16, 400);
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ESP_ERROR_CHECK(mcpwm_timer_set_period(group.h_timer, SERVO_TIMEBASE_RESOLUTION_HZ/group_freq));
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group.rc_frequency = group_freq;
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group.rc_frequency = freq_hz; // set frequency and corresponding period
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ESP_ERROR_CHECK(mcpwm_timer_set_period(group.h_timer, constrain_freq(group)));
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// disallow changing frequency of this group if it is greater than the default
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if (group_freq > SERVO_DEFAULT_FREQ_HZ) {
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if (group.rc_frequency > SERVO_DEFAULT_FREQ_HZ || group.current_mode > MODE_PWM_NORMAL) {
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fast_channel_mask |= group.ch_mask;
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}
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}
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@ -222,6 +236,138 @@ void RCOutput::set_default_rate(uint16_t freq_hz)
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}
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}
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/*
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setup output mode for a group, using group.current_mode.
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*/
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void RCOutput::set_group_mode(pwm_group &group)
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{
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if (!_initialized) {
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return;
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}
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// calculate group timer resolution
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uint32_t resolution_hz;
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switch (group.current_mode) {
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case MODE_PWM_BRUSHED:
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resolution_hz = BRUSH_TIMEBASE_RESOLUTION_HZ;
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break;
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default:
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group.current_mode = MODE_PWM_NONE; // treat as 0 output normal
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// fallthrough
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case MODE_PWM_NONE:
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case MODE_PWM_NORMAL:
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resolution_hz = SERVO_TIMEBASE_RESOLUTION_HZ;
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break;
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}
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if (group.current_mode > MODE_PWM_NORMAL) {
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fast_channel_mask |= group.ch_mask;
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}
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// the timer prescaler is different in normal vs. brushed mode. the only way
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// to change it with the SDK is to completely destroy the timer, then
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// create a "new" one with the right "resolution" (which is converted
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// internally to the prescaler). fortunately we can keep the
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// operator/comparators/generators around. also fortunately the SDK
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// defaults the MCPWM group prescaler to 2, so we have wiggle room to set
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// each timer's prescaler independently without affecting the others.
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// the code to do this was written after experimenting and studying the SDK
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// code and chip manual. we hope it's applicable to future versions and
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// doesn't create enough output glitches to be a serious problem...
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// if allocated, disable and delete the timer (which, mostly due to hardware
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// limitations, doesn't stop it or disconnect it from the operator)
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if (group.h_timer) {
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ESP_ERROR_CHECK(mcpwm_timer_disable(group.h_timer));
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ESP_ERROR_CHECK(mcpwm_del_timer(group.h_timer));
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}
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// build new timer config with the correct resolution and period
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mcpwm_timer_config_t timer_config {
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.group_id = group.mcpwm_group_id,
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.clk_src = MCPWM_TIMER_CLK_SRC_PLL160M,
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.resolution_hz = resolution_hz,
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.count_mode = MCPWM_TIMER_COUNT_MODE_UP,
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.period_ticks = constrain_freq(group),
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};
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// create a "new" timer with the correct settings for this mode (if already
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// allocated this need not reuse the same hardware unit, but likely will)
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ESP_ERROR_CHECK(mcpwm_new_timer(&timer_config, &group.h_timer));
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ESP_ERROR_CHECK(mcpwm_timer_enable(group.h_timer));
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// convincing the hardware unit, if reused, to use the new prescaler value
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// is yet another challenge on top of convincing the software to write it
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// to the register. quoth the technical reference manual (ESP32S3, Version
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// 1.6, section 36.3.2.3), "The moment of updating the clock prescaler’s
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// active register is at the time when the timer starts operating.". this
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// statement is backed up and enhanced here:
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// https://www.esp32.com/viewtopic.php?t=14210#p57277
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// stop the timer when its value equals 0 (though we don't need to start it)
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ESP_ERROR_CHECK(mcpwm_timer_start_stop(group.h_timer, MCPWM_TIMER_STOP_EMPTY));
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// now use the sync mechanism to force the value to 0 so we don't have to
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// wait for it to roll around
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// create a software-activated sync source
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mcpwm_sync_handle_t h_sync;
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mcpwm_soft_sync_config_t sync_config {};
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ESP_ERROR_CHECK(mcpwm_new_soft_sync_src(&sync_config, &h_sync));
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// tell the timer to set its value to 0 on sync
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mcpwm_timer_sync_phase_config_t timer_sync_config {
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.sync_src = h_sync,
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.count_value = 0,
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.direction = MCPWM_TIMER_DIRECTION_UP,
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};
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ESP_ERROR_CHECK(mcpwm_timer_set_phase_on_sync(group.h_timer, &timer_sync_config));
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// activate the sync and so request the set
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ESP_ERROR_CHECK(mcpwm_soft_sync_activate(h_sync));
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// disconnect the sync source and delete it; that's all we needed it for
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timer_sync_config.sync_src = nullptr; // set timer to no source
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ESP_ERROR_CHECK(mcpwm_timer_set_phase_on_sync(group.h_timer, &timer_sync_config));
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ESP_ERROR_CHECK(mcpwm_del_sync_src(h_sync));
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// wait a few timer ticks (at the slowest prescale we use) for the set to
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// happen, the timer to stop, and the prescaler to update (these might each
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// take a full tick)
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hal.scheduler->delay_microseconds(10);
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// now, finally!, start it free-running with the right prescale and period
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ESP_ERROR_CHECK(mcpwm_timer_start_stop(group.h_timer, MCPWM_TIMER_START_NO_STOP));
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// oh, and connect the operator, in case we are using a new timer (it can
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// only connect to one timer so this will clear out any old connection)
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ESP_ERROR_CHECK(mcpwm_operator_connect_timer(group.h_oper, group.h_timer));
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}
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void RCOutput::set_output_mode(uint32_t mask, const enum output_mode mode)
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{
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while (mask) {
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uint8_t chan = __builtin_ffs(mask)-1;
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if (!_initialized || chan >= MAX_CHANNELS) {
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return;
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}
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pwm_group &group = *pwm_chan_list[chan].group;
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group.current_mode = mode;
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set_group_mode(group);
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// acknowledge the setting of any channels sharing this group
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for (chan=0; chan<MAX_CHANNELS; chan++) {
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if (pwm_chan_list[chan].group == &group) {
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mask &= ~(1U << chan);
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}
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}
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}
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}
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uint16_t RCOutput::get_freq(uint8_t chan)
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{
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if (!_initialized || chan >= MAX_CHANNELS) {
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@ -341,8 +487,34 @@ void RCOutput::write_int(uint8_t chan, uint16_t period_us)
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if (period_us > max_period_us) {
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period_us = max_period_us;
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}
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ESP_ERROR_CHECK(mcpwm_comparator_set_compare_value(ch.h_cmpr, period_us));
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ch.value = period_us;
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uint16_t compare_value;
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switch(ch.group->current_mode) {
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case MODE_PWM_BRUSHED: {
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float duty = 0;
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if (period_us <= _esc_pwm_min) {
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duty = 0;
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} else if (period_us >= _esc_pwm_max) {
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duty = 1;
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} else {
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duty = ((float)(period_us - _esc_pwm_min))/(_esc_pwm_max - _esc_pwm_min);
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}
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compare_value = duty*BRUSH_TIMEBASE_RESOLUTION_HZ/ch.group->rc_frequency;
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break;
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}
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case MODE_PWM_NORMAL:
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compare_value = period_us;
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break;
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case MODE_PWM_NONE:
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default:
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compare_value = 0;
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break;
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}
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ESP_ERROR_CHECK(mcpwm_comparator_set_compare_value(ch.h_cmpr, compare_value));
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}
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/*
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@ -55,6 +55,8 @@ public:
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uint16_t read(uint8_t ch) override;
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void read(uint16_t* period_us, uint8_t len) override;
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void set_output_mode(uint32_t mask, const enum output_mode mode) override;
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void cork() override;
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void push() override;
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@ -108,6 +110,7 @@ private:
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uint32_t rc_frequency; // frequency in Hz
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uint32_t ch_mask; // mask of channels in this group
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enum output_mode current_mode; // output mode (none, normal, brushed)
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};
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struct pwm_chan {
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@ -122,6 +125,10 @@ private:
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uint32_t fast_channel_mask;
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uint32_t constrain_freq(pwm_group &group);
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void set_group_mode(pwm_group &group);
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void write_int(uint8_t chan, uint16_t period_us);
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static pwm_group pwm_group_list[];
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