From 8764d69e2c8e7a6aff2942e4bf9db318c84a8fac Mon Sep 17 00:00:00 2001
From: Andrew Tridgell <andrew@tridgell.net>
Date: Sat, 1 May 2021 13:02:18 +1000
Subject: [PATCH] HAL_ChibiOS: default SDMMC clock to 12.5MHz max on H7

this makes microsd considerably more reliable
---
 libraries/AP_HAL_ChibiOS/hwdef/common/stm32h7_mcuconf.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/libraries/AP_HAL_ChibiOS/hwdef/common/stm32h7_mcuconf.h b/libraries/AP_HAL_ChibiOS/hwdef/common/stm32h7_mcuconf.h
index 2c03f2dd75..5d38d64f13 100644
--- a/libraries/AP_HAL_ChibiOS/hwdef/common/stm32h7_mcuconf.h
+++ b/libraries/AP_HAL_ChibiOS/hwdef/common/stm32h7_mcuconf.h
@@ -546,3 +546,10 @@
 
 // limit ISR count per byte
 #define STM32_I2C_ISR_LIMIT                 6
+
+// limit SDMMC clock to 12.5MHz by default. This increases
+// reliability
+#ifndef STM32_SDC_MAX_CLOCK
+#define STM32_SDC_MAX_CLOCK                 12500000
+#endif
+