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AP_HAL_ChibiOS: write out serial ports that are available when configuring
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@ -1828,6 +1828,19 @@ INCLUDE common.ld
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return
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f.write('\n// UART configuration\n')
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# write out which serial ports we actually have
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idx = 0
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nports = 0
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serial_order = self.get_config('SERIAL_ORDER', required=False, aslist=True)
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for serial in serial_order:
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if serial == 'EMPTY':
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f.write('#define HAL_HAVE_SERIAL%u 0\n' % idx)
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else:
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f.write('#define HAL_HAVE_SERIAL%u 1\n' % idx)
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nports = nports + 1
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idx += 1
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f.write('#define HAL_NUM_SERIAL_PORTS %u\n' % nports)
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# write out driver declarations for HAL_ChibOS_Class.cpp
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devnames = "ABCDEFGHIJ"
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sdev = 0
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