From 805ed73d94279b82c0b80c6fdb39768503e9b5df Mon Sep 17 00:00:00 2001 From: Robert Taylor Date: Wed, 8 Mar 2023 16:31:42 -0700 Subject: [PATCH] AP_HAL_ChibiOS: Fix bug where STM32L496 would not init CAN2 This is due to the way that the APB peripheral was configured. RCC_APB1ENR1_CAN2EN was not accounted for in the CAN hardware init, so CAN2 clock init was never attempted. I copied the way CAN1 is initialized based on different hardware description headers. --- libraries/AP_HAL_ChibiOS/CanIface.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/libraries/AP_HAL_ChibiOS/CanIface.cpp b/libraries/AP_HAL_ChibiOS/CanIface.cpp index 7666247f72..d2f23c016b 100644 --- a/libraries/AP_HAL_ChibiOS/CanIface.cpp +++ b/libraries/AP_HAL_ChibiOS/CanIface.cpp @@ -774,7 +774,13 @@ void CANIface::initOnce(bool enable_irq) RCC->APB1RSTR &= ~RCC_APB1RSTR_CAN1RST; #endif break; -#ifdef RCC_APB1ENR_CAN2EN +#if defined(RCC_APB1ENR1_CAN2EN) + case 1: + RCC->APB1ENR1 |= RCC_APB1ENR1_CAN2EN; + RCC->APB1RSTR1 |= RCC_APB1RSTR1_CAN2RST; + RCC->APB1RSTR1 &= ~RCC_APB1RSTR1_CAN2RST; + break; +#elif defined(RCC_APB1ENR_CAN2EN) case 1: RCC->APB1ENR |= RCC_APB1ENR_CAN2EN; RCC->APB1RSTR |= RCC_APB1RSTR_CAN2RST;