mirror of
https://github.com/ArduPilot/ardupilot
synced 2025-02-03 14:38:44 -04:00
HAL_ChibiOS: save/restore home position in backup registers
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parent
186f36a5bd
commit
723a7bb647
@ -296,3 +296,19 @@ void Util::set_soft_armed(const bool b)
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AP_HAL::Util::set_soft_armed(b);
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stm32_set_backup_armed(b);
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}
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// backup home state for restore on watchdog reset
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void Util::set_backup_home_state(int32_t lat, int32_t lon, int32_t alt_cm) const
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{
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stm32_set_backup_home(lat, lon, alt_cm);
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}
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// backup home state for restore on watchdog reset
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bool Util::get_backup_home_state(int32_t &lat, int32_t &lon, int32_t &alt_cm) const
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{
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if (was_watchdog_reset()) {
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stm32_get_backup_home(&lat, &lon, &alt_cm);
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return true;
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}
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return false;
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}
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@ -69,6 +69,12 @@ public:
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// return true if vehicle was armed and this was a watchdog reset
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bool was_watchdog_armed() const override;
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// backup home state for restore on watchdog reset
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void set_backup_home_state(int32_t lat, int32_t lon, int32_t alt_cm) const override;
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// backup home state for restore on watchdog reset
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bool get_backup_home_state(int32_t &lat, int32_t &lon, int32_t &alt_cm) const override;
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private:
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#ifdef HAL_PWM_ALARM
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struct ToneAlarmPwmGroup {
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@ -219,14 +219,14 @@ uint32_t get_fattime()
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return fattime;
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}
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// get RTC backup register 0
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static uint32_t get_rtc_backup0(void)
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// get RTC backup register
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uint32_t get_rtc_backup(uint8_t n)
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{
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return RTC->BKP0R;
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return ((__IO uint32_t *)&RTC->BKP0R)[n];
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}
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// set RTC backup register 0
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static void set_rtc_backup0(uint32_t v)
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void set_rtc_backup(uint8_t n, uint32_t v)
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{
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if ((RCC->BDCR & RCC_BDCR_RTCEN) == 0) {
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RCC->BDCR |= STM32_RTCSEL;
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@ -237,40 +237,19 @@ static void set_rtc_backup0(uint32_t v)
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#else
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PWR->CR1 |= PWR_CR1_DBP;
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#endif
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RTC->BKP0R = v;
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((__IO uint32_t *)&RTC->BKP0R)[n] = v;
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}
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// see if RTC registers is setup for a fast reboot
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enum rtc_boot_magic check_fast_reboot(void)
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{
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return (enum rtc_boot_magic)get_rtc_backup0();
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return (enum rtc_boot_magic)get_rtc_backup(0);
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}
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// set RTC register for a fast reboot
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void set_fast_reboot(enum rtc_boot_magic v)
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{
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set_rtc_backup0(v);
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}
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// get RTC backup register 1
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uint32_t get_rtc_backup1(void)
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{
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return RTC->BKP1R;
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}
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// set RTC backup register 1
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void set_rtc_backup1(uint32_t v)
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{
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if ((RCC->BDCR & RCC_BDCR_RTCEN) == 0) {
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RCC->BDCR |= STM32_RTCSEL;
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RCC->BDCR |= RCC_BDCR_RTCEN;
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}
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#ifdef PWR_CR_DBP
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PWR->CR |= PWR_CR_DBP;
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#else
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PWR->CR1 |= PWR_CR1_DBP;
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#endif
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RTC->BKP1R = v;
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set_rtc_backup(0, v);
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}
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/*
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@ -79,12 +79,12 @@ void malloc_init(void);
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iomode_t palReadLineMode(ioline_t line);
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#endif
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// get RTC backup register 1
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uint32_t get_rtc_backup1(void);
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// get RTC backup register
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uint32_t get_rtc_backup(uint8_t n);
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// set RTC backup register
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void set_rtc_backup(uint8_t n, uint32_t v);
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// set RTC backup register 1
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void set_rtc_backup1(uint32_t v);
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#ifdef __cplusplus
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}
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#endif
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@ -41,6 +41,13 @@
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#error "Unsupported IWDG MCU config"
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#endif
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#define WDG_SAFETY_BIT 0x01
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#define WDG_ARMED_BIT 0x02
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#define BKP_IDX_FLAGS 0x01
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#define BKP_IDX_HOME 0x02
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typedef struct
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{
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__IO uint32_t KR; /*!< IWDG Key register, Address offset: 0x00 */
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@ -54,7 +61,7 @@ typedef struct
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static bool was_watchdog_reset;
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static bool watchdog_enabled;
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static uint32_t boot_backup1_state;
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static uint32_t boot_backup_state[5];
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/*
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setup the watchdog
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@ -87,7 +94,9 @@ void stm32_watchdog_save_reason(void)
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{
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if (WDG_RESET_STATUS & WDG_RESET_IS_IWDG) {
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was_watchdog_reset = true;
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boot_backup1_state = get_rtc_backup1();
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for (uint8_t i=0; i<sizeof(boot_backup_state)/sizeof(boot_backup_state[0]); i++) {
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boot_backup_state[i] = get_rtc_backup(i);
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}
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}
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}
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@ -97,7 +106,9 @@ void stm32_watchdog_save_reason(void)
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void stm32_watchdog_clear_reason(void)
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{
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WDG_RESET_STATUS = WDG_RESET_CLEAR;
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set_rtc_backup1(0);
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for (uint8_t i=1; i<sizeof(boot_backup_state)/sizeof(boot_backup_state[0]); i++) {
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set_rtc_backup(i, 0);
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}
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}
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/*
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@ -108,9 +119,6 @@ bool stm32_was_watchdog_reset(void)
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return was_watchdog_reset;
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}
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#define WDG_SAFETY_BIT 0x01
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#define WDG_ARMED_BIT 0x02
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/*
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set the safety state in backup register
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@ -119,10 +127,10 @@ bool stm32_was_watchdog_reset(void)
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*/
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void stm32_set_backup_safety_state(bool safety_on)
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{
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uint32_t v = get_rtc_backup1();
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uint32_t v = get_rtc_backup(BKP_IDX_FLAGS);
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uint32_t v2 = safety_on?(v | WDG_SAFETY_BIT):(v & ~WDG_SAFETY_BIT);
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if (v != v2) {
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set_rtc_backup1(v2);
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set_rtc_backup(BKP_IDX_FLAGS, v2);
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}
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}
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@ -131,7 +139,7 @@ void stm32_set_backup_safety_state(bool safety_on)
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*/
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bool stm32_get_boot_backup_safety_state(void)
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{
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return (boot_backup1_state & WDG_SAFETY_BIT) != 0;
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return (boot_backup_state[BKP_IDX_FLAGS] & WDG_SAFETY_BIT) != 0;
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}
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/*
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@ -142,10 +150,10 @@ bool stm32_get_boot_backup_safety_state(void)
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*/
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void stm32_set_backup_armed(bool armed)
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{
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uint32_t v = get_rtc_backup1();
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uint32_t v = get_rtc_backup(BKP_IDX_FLAGS);
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uint32_t v2 = armed?(v | WDG_ARMED_BIT): (v & ~WDG_ARMED_BIT);
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if (v != v2) {
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set_rtc_backup1(v2);
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set_rtc_backup(BKP_IDX_FLAGS, v2);
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}
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}
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@ -154,5 +162,25 @@ void stm32_set_backup_armed(bool armed)
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*/
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bool stm32_get_boot_backup_armed(void)
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{
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return (boot_backup1_state & WDG_ARMED_BIT) != 0;
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return (boot_backup_state[BKP_IDX_FLAGS] & WDG_ARMED_BIT) != 0;
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}
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/*
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set home state in backup
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*/
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void stm32_set_backup_home(int32_t lat, int32_t lon, int32_t alt_cm)
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{
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set_rtc_backup(BKP_IDX_HOME, (uint32_t)lat);
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set_rtc_backup(BKP_IDX_HOME+1, (uint32_t)lon);
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set_rtc_backup(BKP_IDX_HOME+2, (uint32_t)alt_cm);
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}
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/*
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get home state from backup
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*/
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void stm32_get_backup_home(int32_t *lat, int32_t *lon, int32_t *alt_cm)
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{
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*lat = (int32_t)boot_backup_state[BKP_IDX_HOME];
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*lon = (int32_t)boot_backup_state[BKP_IDX_HOME+1];
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*alt_cm = (int32_t)boot_backup_state[BKP_IDX_HOME+2];
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}
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@ -48,6 +48,16 @@ void stm32_set_backup_armed(bool armed);
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get the armed state in backup register from initial boot
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*/
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bool stm32_get_boot_backup_armed(void);
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/*
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set home state in backup
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*/
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void stm32_set_backup_home(int32_t lat, int32_t lon, int32_t alt_cm);
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/*
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get home state from backup
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*/
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void stm32_get_backup_home(int32_t *lat, int32_t *lon, int32_t *alt_cm);
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#ifdef __cplusplus
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}
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