mirror of https://github.com/ArduPilot/ardupilot
AP_HAL: moved printf implementation from AP_HAL_AVR to AP_HAL
this gives a common printf implementation on all boards, which simplifies testing, and also simplifies porting to new boards
This commit is contained in:
parent
4ad4b60fbc
commit
60122f9877
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@ -8,17 +8,17 @@
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class AP_HAL::Util {
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public:
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virtual int snprintf(char* str, size_t size,
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const char *format, ...) = 0;
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int snprintf(char* str, size_t size,
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const char *format, ...);
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virtual int snprintf_P(char* str, size_t size,
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const prog_char_t *format, ...) = 0;
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int snprintf_P(char* str, size_t size,
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const prog_char_t *format, ...);
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virtual int vsnprintf(char* str, size_t size,
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const char *format, va_list ap) = 0;
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int vsnprintf(char* str, size_t size,
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const char *format, va_list ap);
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virtual int vsnprintf_P(char* str, size_t size,
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const prog_char_t *format, va_list ap) = 0;
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int vsnprintf_P(char* str, size_t size,
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const prog_char_t *format, va_list ap);
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// run a debug shall on the given stream if possible. This is used
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// to support dropping into a debug shell to run firmware upgrade
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@ -39,45 +39,17 @@
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#include <AP_HAL.h>
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#if CONFIG_HAL_BOARD == HAL_BOARD_APM1 || CONFIG_HAL_BOARD == HAL_BOARD_APM2
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#include <AP_Progmem.h>
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#include <stdarg.h>
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#include <string.h>
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#include <math.h>
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#include "ftoa_engine.h"
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#include "xtoa_fast.h"
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#include "ntz.h"
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#include "print_vprintf.h"
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// workaround for GCC bug c++/34734
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#undef PROGMEM
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#define PROGMEM __attribute__(( section(".progmem.data") ))
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#undef PSTR
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#if __AVR__ && __GNUC__ == 4 && __GNUC_MINOR > 5
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/* Need const type for progmem: new for avr-gcc 4.6 */
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#define PSTR(s) (__extension__({static prog_char __c[] PROGMEM = (s); &__c[0];}))
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#else
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#define PSTR(s) (__extension__({static const prog_char __c[] PROGMEM = (s); &__c[0];}))
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#endif
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#ifdef GETBYTE
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#undef GETBYTE
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#endif
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#define GETBYTE(flag, mask, pnt) ({ \
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unsigned char __c; \
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asm ( \
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"sbrc %2,%3 \n\t" \
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"lpm %0,Z+ \n\t" \
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"sbrs %2,%3 \n\t" \
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"ld %0,Z+ " \
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: "=r" (__c), \
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"+z" (pnt) \
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: "r" (flag), \
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"I" (ntz(mask)) \
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); \
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__c; \
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})
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#define GETBYTE(flag, mask, pnt) ((flag)&(mask)?pgm_read_byte(pnt++):*pnt++)
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#define FL_ZFILL 0x01
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#define FL_PLUS 0x02
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@ -104,7 +76,7 @@ void print_vprintf (AP_HAL::Print *s, unsigned char in_progmem, const char *fmt,
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unsigned char flags;
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unsigned char width;
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unsigned char prec;
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unsigned char buf[11]; /* size for -1 in octal, without '\0' */
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unsigned char buf[13];
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for (;;) {
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@ -199,25 +171,30 @@ void print_vprintf (AP_HAL::Print *s, unsigned char in_progmem, const char *fmt,
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flags &= ~FL_FLTUPP;
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flt_oper:
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float value = va_arg(ap,double);
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if (!(flags & FL_PREC))
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prec = 6;
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prec = 7;
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flags &= ~(FL_FLTEXP | FL_FLTFIX);
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if (c == 'e')
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if (c == 'e') {
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flags |= FL_FLTEXP;
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else if (c == 'f')
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} else if (c == 'f') {
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flags |= FL_FLTFIX;
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else if (prec > 0)
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} else if (prec > 0)
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prec -= 1;
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if ((flags & FL_FLTFIX) && fabsf(value) > 9999999) {
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flags = (flags & ~FL_FLTFIX) | FL_FLTEXP;
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}
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if (flags & FL_FLTFIX) {
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vtype = 7; /* 'prec' arg for 'ftoa_engine' */
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ndigs = prec < 60 ? prec + 1 : 60;
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} else {
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if (prec > 7) prec = 7;
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if (prec > 10) prec = 10;
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vtype = prec;
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ndigs = 0;
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}
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exp = ftoa_engine(va_arg(ap,double), (char *)buf, vtype, ndigs);
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memset(buf, 0, sizeof(buf));
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exp = ftoa_engine(value, (char *)buf, vtype, ndigs);
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vtype = buf[0];
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sign = 0;
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@ -229,7 +206,6 @@ void print_vprintf (AP_HAL::Print *s, unsigned char in_progmem, const char *fmt,
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sign = ' ';
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if (vtype & (FTOA_NAN | FTOA_INF)) {
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const char *p;
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ndigs = sign ? 4 : 3;
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if (width > ndigs) {
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width -= ndigs;
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@ -243,7 +219,7 @@ void print_vprintf (AP_HAL::Print *s, unsigned char in_progmem, const char *fmt,
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}
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if (sign)
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s->write(sign);
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p = PSTR("inf");
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const prog_char_t *p = PSTR("inf");
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if (vtype & FTOA_NAN)
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p = PSTR("nan");
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while ( (ndigs = pgm_read_byte((const prog_char *)p)) != 0) {
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} /* for (;;) */
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}
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#endif
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@ -1,6 +1,6 @@
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#ifndef __AP_HAL_AVR_UTILITY_VPRINTF_H__
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#define __AP_HAL_AVR_UTILITY_VPRINTF_H__
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#ifndef __AP_HAL_UTILITY_VPRINTF_H__
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#define __AP_HAL_UTILITY_VPRINTF_H__
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#include <AP_HAL.h>
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#include <stdarg.h>
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void print_vprintf (AP_HAL::Print *s, unsigned char in_progmem, const char *fmt, va_list ap);
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#endif //__AP_HAL_AVR_UTILITY_VPRINTF_H__
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#endif //__AP_HAL_UTILITY_VPRINTF_H__
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@ -31,7 +31,7 @@
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#include <stdint.h>
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#include "xtoa_fast.h"
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char * ultoa_invert (uint32_t val, char *s, int base) {
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char * ultoa_invert (uint32_t val, char *s, uint8_t base) {
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if (base == 8) {
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do {
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*s = '0' + (val & 0x7);
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@ -35,7 +35,7 @@
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#define _XTOA_FAST_H_
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/* Internal function for use from `printf'. */
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char *ultoa_invert (unsigned long val, char *s, int base);
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char *ultoa_invert (uint32_t val, char *s, uint8_t base);
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/* Next flags are to use with `base'. Unused fields are reserved. */
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#define XTOA_PREFIX 0x0100 /* put prefix for octal or hex */
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@ -1,65 +0,0 @@
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#include <AP_HAL.h>
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#if CONFIG_HAL_BOARD == HAL_BOARD_APM1 || CONFIG_HAL_BOARD == HAL_BOARD_APM2
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#include "Util.h"
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#include "utility/print_vprintf.h"
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using namespace AP_HAL_AVR;
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/* Helper class implements AP_HAL::Print so we can use utility/vprintf */
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class BufferPrinter : public AP_HAL::Print {
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public:
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BufferPrinter(char* str, size_t size) : _offs(0), _str(str), _size(size) {}
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size_t write(uint8_t c) {
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if (_offs < _size) {
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_str[_offs] = c;
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_offs++;
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return 1;
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} else {
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return 0;
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}
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}
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size_t _offs;
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char* const _str;
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const size_t _size;
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};
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int AVRUtil::snprintf(char* str, size_t size, const char *format, ...)
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{
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va_list ap;
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va_start(ap, format);
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int res = this->vsnprintf(str, size, format, ap);
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va_end(ap);
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return res;
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}
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int AVRUtil::snprintf_P(char* str, size_t size, const prog_char_t *format, ...)
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{
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va_list ap;
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va_start(ap, format);
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int res = this->vsnprintf_P(str, size, format, ap);
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va_end(ap);
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return res;
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}
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int AVRUtil::vsnprintf(char* str, size_t size, const char *format, va_list ap)
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{
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BufferPrinter buf(str, size);
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print_vprintf(&buf, 0, format, ap);
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return (int) buf._offs;
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}
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int AVRUtil::vsnprintf_P(char* str, size_t size, const prog_char_t *format,
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va_list ap)
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{
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BufferPrinter buf(str, size);
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print_vprintf(&buf, 1,(const char*) format, ap);
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if (buf._offs < size) {
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// null terminate if possible
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str[buf._offs] = 0;
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}
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return (int) buf._offs;
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}
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#endif
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@ -7,11 +7,6 @@
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class AP_HAL_AVR::AVRUtil : public AP_HAL::Util {
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public:
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int snprintf(char* str, size_t size, const char *format, ...);
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int snprintf_P(char* str, size_t size, const prog_char_t *format, ...);
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int vsnprintf(char* str, size_t size, const char *format, va_list ap);
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int vsnprintf_P(char* str, size_t size, const prog_char_t *format,
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va_list ap);
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bool run_debug_shell(AP_HAL::BetterStream *stream) { return false; }
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};
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@ -1,369 +0,0 @@
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/* Copyright (c) 2002, 2005, 2006, 2007 Marek Michalkiewicz
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Copyright (c) 2006 Dmitry Xmelkov
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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#include <AP_HAL_Boards.h>
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#if CONFIG_HAL_BOARD == HAL_BOARD_APM1 || CONFIG_HAL_BOARD == HAL_BOARD_APM2
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/*
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macros.inc - macros for use in assembler sources
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Contributors:
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Created by Marek Michalkiewicz <marekm@linux.org.pl>
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*/
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#include <avr/io.h>
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//#include "sectionname.h"
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/* if not defined, assume old version with underscores */
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#ifndef __USER_LABEL_PREFIX__
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#define __USER_LABEL_PREFIX__ _
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#endif
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#ifndef __REGISTER_PREFIX__
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#define __REGISTER_PREFIX__
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#endif
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/* the assembler line separator (just in case it ever changes) */
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#define _L $
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#define CONCAT1(a, b) CONCAT2(a, b)
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#define CONCAT2(a, b) a ## b
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#define _U(x) CONCAT1(__USER_LABEL_PREFIX__, x)
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#define _R(x) CONCAT1(__REGISTER_PREFIX__, x)
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/* these should help to fix the "can't have function named r1()" bug
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which may require adding '%' in front of register names. */
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#define r0 _R(r0)
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#define r1 _R(r1)
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#define r2 _R(r2)
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#define r3 _R(r3)
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#define r4 _R(r4)
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#define r5 _R(r5)
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#define r6 _R(r6)
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#define r7 _R(r7)
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#define r8 _R(r8)
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#define r9 _R(r9)
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#define r10 _R(r10)
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#define r11 _R(r11)
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#define r12 _R(r12)
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#define r13 _R(r13)
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#define r14 _R(r14)
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#define r15 _R(r15)
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#define r16 _R(r16)
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#define r17 _R(r17)
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#define r18 _R(r18)
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#define r19 _R(r19)
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#define r20 _R(r20)
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#define r21 _R(r21)
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#define r22 _R(r22)
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#define r23 _R(r23)
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#define r24 _R(r24)
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#define r25 _R(r25)
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#define r26 _R(r26)
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#define r27 _R(r27)
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#define r28 _R(r28)
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#define r29 _R(r29)
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#define r30 _R(r30)
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#define r31 _R(r31)
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#ifndef __tmp_reg__
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#define __tmp_reg__ r0
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#endif
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#ifndef __zero_reg__
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#define __zero_reg__ r1
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#endif
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#if __AVR_MEGA__
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#define XJMP jmp
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#define XCALL call
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#else
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#define XJMP rjmp
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#define XCALL rcall
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#endif
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/* used only by fplib/strtod.S - libgcc internal function calls */
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#define PROLOGUE_SAVES(offset) XJMP (__prologue_saves__ + 2 * (offset))
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#define EPILOGUE_RESTORES(offset) XJMP (__epilogue_restores__ + 2 * (offset))
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#if FLASHEND > 0x10000 /* ATmega103 */
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#define BIG_CODE 1
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#else
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#define BIG_CODE 0
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#endif
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#ifndef __AVR_HAVE_MOVW__
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# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__
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# define __AVR_HAVE_MOVW__ 1
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# endif
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#endif
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#ifndef __AVR_HAVE_LPMX__
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# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__
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# define __AVR_HAVE_LPMX__ 1
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# endif
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#endif
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#ifndef __AVR_HAVE_MUL__
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# if defined(__AVR_ENHANCED__) && __AVR_ENHANCED__
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# define __AVR_HAVE_MUL__ 1
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# endif
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#endif
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/*
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Smart version of movw:
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- uses "movw" if possible (supported by MCU, and both registers even)
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- handles overlapping register pairs correctly
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- no instruction generated if source and destination are the same
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(may expand to 0, 1 or 2 instructions).
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*/
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.macro X_movw dst src
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.L_movw_dst = -1
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.L_movw_src = -1
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.L_movw_n = 0
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.irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \
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r10,r11,r12,r13,r14,r15,r16,r17,r18,r19, \
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r20,r21,r22,r23,r24,r25,r26,r27,r28,r29, \
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r30,r31
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.ifc \reg,\dst
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.L_movw_dst = .L_movw_n
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.endif
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.ifc \reg,\src
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.L_movw_src = .L_movw_n
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.endif
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.L_movw_n = .L_movw_n + 1
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.endr
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.L_movw_n = 0
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.irp reg, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, \
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R10,R11,R12,R13,R14,R15,R16,R17,R18,R19, \
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R20,R21,R22,R23,R24,R25,R26,R27,R28,R29, \
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R30,R31
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.ifc \reg,\dst
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.L_movw_dst = .L_movw_n
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.endif
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.ifc \reg,\src
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.L_movw_src = .L_movw_n
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.endif
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.L_movw_n = .L_movw_n + 1
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.endr
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.if .L_movw_dst < 0
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.L_movw_n = 0
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.rept 32
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.if \dst == .L_movw_n
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.L_movw_dst = .L_movw_n
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.endif
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.L_movw_n = .L_movw_n + 1
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.endr
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.endif
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.if .L_movw_src < 0
|
||||
.L_movw_n = 0
|
||||
.rept 32
|
||||
.if \src == .L_movw_n
|
||||
.L_movw_src = .L_movw_n
|
||||
.endif
|
||||
.L_movw_n = .L_movw_n + 1
|
||||
.endr
|
||||
.endif
|
||||
.if (.L_movw_dst < 0) || (.L_movw_src < 0)
|
||||
.err ; Invalid 'X_movw' arg.
|
||||
.endif
|
||||
|
||||
.if ((.L_movw_src) - (.L_movw_dst)) /* different registers */
|
||||
.if (((.L_movw_src) | (.L_movw_dst)) & 0x01)
|
||||
.if (((.L_movw_src)-(.L_movw_dst)) & 0x80) /* src < dest */
|
||||
mov (.L_movw_dst)+1, (.L_movw_src)+1
|
||||
mov (.L_movw_dst), (.L_movw_src)
|
||||
.else /* src > dest */
|
||||
mov (.L_movw_dst), (.L_movw_src)
|
||||
mov (.L_movw_dst)+1, (.L_movw_src)+1
|
||||
.endif
|
||||
.else /* both even -> overlap not possible */
|
||||
#if defined(__AVR_HAVE_MOVW__) && __AVR_HAVE_MOVW__
|
||||
movw \dst, \src
|
||||
#else
|
||||
mov (.L_movw_dst), (.L_movw_src)
|
||||
mov (.L_movw_dst)+1, (.L_movw_src)+1
|
||||
#endif
|
||||
.endif
|
||||
.endif
|
||||
.endm
|
||||
|
||||
/* Macro 'X_lpm' extends enhanced lpm instruction for classic chips.
|
||||
Usage:
|
||||
X_lpm reg, dst
|
||||
where
|
||||
reg is 0..31, r0..r31 or R0..R31
|
||||
dst is z, Z, z+ or Z+
|
||||
It is possible to omit both arguments.
|
||||
|
||||
Possible results for classic chips:
|
||||
lpm
|
||||
lpm / mov Rd,r0
|
||||
lpm / adiw ZL,1
|
||||
lpm / mov Rd,r0 / adiw ZL,1
|
||||
|
||||
For enhanced chips it is one instruction always.
|
||||
|
||||
ATTENTION: unlike enhanced chips SREG (S,V,N,Z,C) flags are
|
||||
changed in case of 'Z+' dst. R0 is scratch.
|
||||
*/
|
||||
.macro X_lpm dst=r0, src=Z
|
||||
|
||||
/* dst evaluation */
|
||||
.L_lpm_dst = -1
|
||||
|
||||
.L_lpm_n = 0
|
||||
.irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \
|
||||
r10,r11,r12,r13,r14,r15,r16,r17,r18,r19, \
|
||||
r20,r21,r22,r23,r24,r25,r26,r27,r28,r29, \
|
||||
r30,r31
|
||||
.ifc \reg,\dst
|
||||
.L_lpm_dst = .L_lpm_n
|
||||
.endif
|
||||
.L_lpm_n = .L_lpm_n + 1
|
||||
.endr
|
||||
|
||||
.L_lpm_n = 0
|
||||
.irp reg, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, \
|
||||
R10,R11,R12,R13,R14,R15,R16,R17,R18,R19, \
|
||||
R20,R21,R22,R23,R24,R25,R26,R27,R28,R29, \
|
||||
R30,R31
|
||||
.ifc \reg,\dst
|
||||
.L_lpm_dst = .L_lpm_n
|
||||
.endif
|
||||
.L_lpm_n = .L_lpm_n + 1
|
||||
.endr
|
||||
|
||||
.if .L_lpm_dst < 0
|
||||
.L_lpm_n = 0
|
||||
.rept 32
|
||||
.if \dst == .L_lpm_n
|
||||
.L_lpm_dst = .L_lpm_n
|
||||
.endif
|
||||
.L_lpm_n = .L_lpm_n + 1
|
||||
.endr
|
||||
.endif
|
||||
|
||||
.if (.L_lpm_dst < 0)
|
||||
.err ; Invalid dst arg of 'X_lpm' macro.
|
||||
.endif
|
||||
|
||||
/* src evaluation */
|
||||
.L_lpm_src = -1
|
||||
.L_lpm_n = 0
|
||||
.irp reg, z,Z,z+,Z+
|
||||
.ifc \reg,\src
|
||||
.L_lpm_src = .L_lpm_n
|
||||
.endif
|
||||
.L_lpm_n = .L_lpm_n + 1
|
||||
.endr
|
||||
|
||||
.if (.L_lpm_src < 0)
|
||||
.err ; Invalid src arg of 'X_lpm' macro.
|
||||
.endif
|
||||
|
||||
/* instruction(s) */
|
||||
.if .L_lpm_src < 2
|
||||
.if .L_lpm_dst == 0
|
||||
lpm
|
||||
.else
|
||||
#if defined(__AVR_HAVE_LPMX__) && __AVR_HAVE_LPMX__
|
||||
lpm .L_lpm_dst, Z
|
||||
#else
|
||||
lpm
|
||||
mov .L_lpm_dst, r0
|
||||
#endif
|
||||
.endif
|
||||
.else
|
||||
.if (.L_lpm_dst >= 30)
|
||||
.err ; Registers 30 and 31 are inhibited as 'X_lpm *,Z+' dst.
|
||||
.endif
|
||||
#if defined(__AVR_HAVE_LPMX__) && __AVR_HAVE_LPMX__
|
||||
lpm .L_lpm_dst, Z+
|
||||
#else
|
||||
lpm
|
||||
.if .L_lpm_dst
|
||||
mov .L_lpm_dst, r0
|
||||
.endif
|
||||
adiw r30, 1
|
||||
#endif
|
||||
.endif
|
||||
.endm
|
||||
|
||||
/*
|
||||
LPM_R0_ZPLUS_INIT is used before the loop to initialize RAMPZ
|
||||
for future devices with RAMPZ:Z auto-increment - [e]lpm r0, Z+.
|
||||
|
||||
LPM_R0_ZPLUS_NEXT is used inside the loop to load a byte from
|
||||
the program memory at [RAMPZ:]Z to R0, and increment [RAMPZ:]Z.
|
||||
|
||||
The argument in both macros is a register that contains the
|
||||
high byte (bits 23-16) of the address, bits 15-0 should be in
|
||||
the Z (r31:r30) register. It can be any register except for:
|
||||
r0, r1 (__zero_reg__ - assumed to always contain 0), r30, r31.
|
||||
*/
|
||||
|
||||
.macro LPM_R0_ZPLUS_INIT hhi
|
||||
#if __AVR_ENHANCED__
|
||||
#if BIG_CODE
|
||||
out AVR_RAMPZ_ADDR, \hhi
|
||||
#endif
|
||||
#endif
|
||||
.endm
|
||||
|
||||
.macro LPM_R0_ZPLUS_NEXT hhi
|
||||
#if __AVR_ENHANCED__
|
||||
#if BIG_CODE
|
||||
/* ELPM with RAMPZ:Z post-increment, load RAMPZ only once */
|
||||
elpm r0, Z+
|
||||
#else
|
||||
/* LPM with Z post-increment, max 64K, no RAMPZ (ATmega83/161/163/32) */
|
||||
lpm r0, Z+
|
||||
#endif
|
||||
#else
|
||||
#if BIG_CODE
|
||||
/* ELPM without post-increment, load RAMPZ each time (ATmega103) */
|
||||
out AVR_RAMPZ_ADDR, \hhi
|
||||
elpm
|
||||
adiw r30,1
|
||||
adc \hhi, __zero_reg__
|
||||
#else
|
||||
/* LPM without post-increment, max 64K, no RAMPZ (AT90S*) */
|
||||
lpm
|
||||
adiw r30,1
|
||||
#endif
|
||||
#endif
|
||||
.endm
|
||||
#endif
|
|
@ -1,54 +0,0 @@
|
|||
/* Copyright (c) 2007, Dmitry Xmelkov
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in
|
||||
the documentation and/or other materials provided with the
|
||||
distribution.
|
||||
* Neither the name of the copyright holders nor the names of
|
||||
contributors may be used to endorse or promote products derived
|
||||
from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE. */
|
||||
|
||||
/* $Id: ntz.h 1217 2007-02-18 13:18:05Z dmix $ */
|
||||
|
||||
#ifndef _NTZ_H
|
||||
#define _NTZ_H
|
||||
|
||||
/* Number of Tail Zeros: ntz(x)= (ffs(x) ? ffs(x)-1 : 16)
|
||||
It works with all: cpp, gcc and gas expressions. */
|
||||
#define ntz(x) \
|
||||
( (1 & (((x) & 1) == 0)) \
|
||||
+ (1 & (((x) & 3) == 0)) \
|
||||
+ (1 & (((x) & 7) == 0)) \
|
||||
+ (1 & (((x) & 017) == 0)) \
|
||||
+ (1 & (((x) & 037) == 0)) \
|
||||
+ (1 & (((x) & 077) == 0)) \
|
||||
+ (1 & (((x) & 0177) == 0)) \
|
||||
+ (1 & (((x) & 0377) == 0)) \
|
||||
+ (1 & (((x) & 0777) == 0)) \
|
||||
+ (1 & (((x) & 01777) == 0)) \
|
||||
+ (1 & (((x) & 03777) == 0)) \
|
||||
+ (1 & (((x) & 07777) == 0)) \
|
||||
+ (1 & (((x) & 017777) == 0)) \
|
||||
+ (1 & (((x) & 037777) == 0)) \
|
||||
+ (1 & (((x) & 077777) == 0)) \
|
||||
+ (1 & (((x) & 0177777) == 0)) )
|
||||
|
||||
#endif /* !_NTZ_H */
|
Loading…
Reference in New Issue