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HAL_ChibiOS: fixed watchdog on H7
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@ -25,7 +25,7 @@
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defines for working out if the reset was from the watchdog
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*/
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#if defined(STM32H7)
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#define WDG_RESET_STATUS (*(__IO uint32_t *)(RCC_BASE + ))
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#define WDG_RESET_STATUS (*(__IO uint32_t *)(RCC_BASE + 0xD0))
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#define WDG_RESET_CLEAR (1U<<16)
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#define WDG_RESET_IS_IWDG (1U<<26)
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#elif defined(STM32F7) || defined(STM32F4)
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